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optimsoc / optimsoc

OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores
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networkmanager_ct includes optimsoc_def.vh #24

Closed imphil closed 8 years ago

imphil commented 8 years ago 
optimsoc-fusesoc --verbose --cores-root $HOME/OptimSoc/optimsoc-sources/examples/sim/compute_tile sim optimsoc:examples:compute_tile_sim --vcd --USE_DEBUG 1

fehlermeldung

wallento commented 8 years ago

Are you sure you are on the correct branch etc.? networkadapter_ct.v is not supposed to even exist anymore. It is networkadapter_ct.sv now.

imphil commented 8 years ago

It wasn't found by me, but by Kai. In my testing on master it works, so let's leave this open until I know what exactly goes wrong on his setup.

wallento commented 8 years ago

It seems to me that the new examples were taken from the source distribution (see cores-root), but the old distribution files, i.e., make was not executed.

imphil commented 8 years ago

Kai: did you run make after updating to optimsoc master?

Acetofive commented 8 years ago

Hi,

I updated the repository and executed: -> "make clean" and then make again. The error still comes during the compilation. It looks like a nested include for me.

PS: Acetofive = Kai.

Acetofive commented 8 years ago

Update: I tried it again in a new folder and the error message is still the same. I cloned:

git clone https://github.com/optimsoc/sources.git optimsoc-sources

setBUILD_EXAMPLES_FPGA := no

and executed a make

imphil commented 8 years ago

You don't need to modify the Makefile, instead type make BUILD_EXAMPLES_FPGA=no But that's not the problem, please send me the full output of make BUILD_EXAMPLES_FPGA=no >logfile.txt 2>&1

Acetofive commented 8 years ago

Hallo Philipp,

hier sind die logfiles vom Build und der Fehlermeldung.

mfg Kai

On 10/05/2016 12:59 PM, Philipp Wagner wrote:

You don't need to modify the Makefile, instead type |make BUILD_EXAMPLES_FPGA=no| But that's not the problem, please send me the full output of |make BUILD_EXAMPLES_FPGA=no >logfile.txt 2>&1|

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INFO: Preparing openrisc:mor1kx:cappuccino INFO: Preparing opensocdebug:interfaces:mor1kx_trace_exec INFO: Preparing optimsoc:core:mor1kx_module INFO: Preparing optimsoc:lisnoc:blocks INFO: Preparing optimsoc:lisnoc:dma INFO: Preparing optimsoc:lisnoc:mp_simple INFO: Preparing optimsoc:lisnoc:router INFO: Preparing optimsoc:networkadapter:networkadapter_ct INFO: Preparing optimsoc:bootrom:bootrom INFO: Preparing optimsoc:base:functions INFO: Preparing optimsoc:sram:plain INFO: Preparing optimsoc:debug_system:mam_wb_adapter INFO: Preparing optimsoc:wb_interconnect:bus INFO: Preparing opensocdebug:interfaces:dii_channel INFO: Preparing opensocdebug:modules:mam INFO: Preparing opensocdebug:modules:mam_wb INFO: Preparing opensocdebug:blocks:timestamp INFO: Preparing opensocdebug:blocks:tracesample INFO: Preparing opensocdebug:blocks:tracepacket INFO: Preparing opensocdebug:modules:stm_mor1kx INFO: Preparing opensocdebug:modules:ctm_mor1kx INFO: Preparing optimsoc:base:config INFO: Preparing optimsoc:tile:compute_tile_dm INFO: Preparing optimsoc:trace_monitor:trace_monitor INFO: Preparing glip:common:channel INFO: Preparing glip:backend:tcp INFO: Preparing opensocdebug:blocks:buffer INFO: Preparing opensocdebug:interconnect:debug_ring INFO: Preparing opensocdebug:blocks:regaccess INFO: Preparing opensocdebug:modules:scm INFO: Preparing opensocdebug:modules:him INFO: Preparing optimsoc:debug:debug_interface INFO: Preparing wallento:simutil:verilator INFO: Preparing optimsoc:examples:compute_tile_sim

INFO: Verilating source

INFO: Starting Verilator: INFO: Verilator working dir: /nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/sim-verilator INFO: Verilator command: /nfs/lis/tools/veripool/verilator/3.886/bin/verilator --cc -f input.vc --top-module tb_compute_tile --exe -LDFLAGS " -Wl,--start-group /nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/sim-verilator/wallento_simutil_verilator.a -Wl,--end-group " -CFLAGS -I/nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/src/wallento_simutil_verilator/inc -CFLAGS -I/nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/sim-verilator -CFLAGS -I/nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/src /nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/src/optimsoc_examples_compute_tile_sim/tb_compute_tile.cpp -GUSE_DEBUG=1 --trace -Wno-fatal -CFLAGS "-std=c++11" -LDFLAGS "-pthread"

INFO: /nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/sim-verilator INFO: /nfs/lis/tools/veripool/verilator/3.886/bin/verilator --cc -f input.vc --top-module tb_compute_tile --exe -LDFLAGS " -Wl,--start-group /nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/sim-verilator/wallento_simutil_verilator.a -Wl,--end-group " -CFLAGS -I/nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/src/wallento_simutil_verilator/inc -CFLAGS -I/nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/sim-verilator -CFLAGS -I/nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/src /nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/src/optimsoc_examples_compute_tile_sim/tb_compute_tile.cpp -GUSE_DEBUG=1 --trace -Wno-fatal -CFLAGS "-std=c++11" -LDFLAGS "-pthread" ERROR: %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: Cannot find include file: optimsoc_def.vh %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: Looked in: %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_lisnoc_dma/rtl/dma/optimsoc_def.vh %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_lisnoc_dma/rtl/dma/optimsoc_def.vh.v %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_lisnoc_dma/rtl/dma/optimsoc_def.vh.sv %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/openrisc_mor1kx_cappuccino/verilog/optimsoc_def.vh %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/openrisc_mor1kx_cappuccino/verilog/optimsoc_def.vh.v %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/openrisc_mor1kx_cappuccino/verilog/optimsoc_def.vh.sv %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_lisnoc_dma/rtl/optimsoc_def.vh %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_lisnoc_dma/rtl/optimsoc_def.vh.v %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_lisnoc_dma/rtl/optimsoc_def.vh.sv %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_base_functions//optimsoc_def.vh %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_base_functions//optimsoc_def.vh.v %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_base_functions//optimsoc_def.vh.sv %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_debug_system_mam_wb_adapter/verilog/optimsoc_def.vh %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_debug_system_mam_wb_adapter/verilog/optimsoc_def.vh.v %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_debug_system_mam_wb_adapter/verilog/optimsoc_def.vh.sv %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_bootrom_bootrom/verilog/optimsoc_def.vh %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_bootrom_bootrom/verilog/optimsoc_def.vh.v %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/optimsoc_bootrom_bootrom/verilog/optimsoc_def.vh.sv %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/glip_backend_tcp//optimsoc_def.vh %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/glip_backend_tcp//optimsoc_def.vh.v %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: ../src/glip_backend_tcp//optimsoc_def.vh.sv %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: optimsoc_def.vh %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: optimsoc_def.vh.v %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: optimsoc_def.vh.sv %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: obj_dir/optimsoc_def.vh %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: obj_dir/optimsoc_def.vh.v %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:33: obj_dir/optimsoc_def.vh.sv %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:53: Define or directive not defined: VCHANNELS %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:53: syntax error, unexpected ';', expecting TYPE-IDENTIFIER %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:56: Define or directive not defined:OPTIMSOC_XDIM %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:56: syntax error, unexpected '*', expecting TYPE-IDENTIFIER %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:56: Define or directive not defined: OPTIMSOC_YDIM %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:78: Define or directive not defined:VCHANNEL_MPSIMPLE %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:78: syntax error, unexpected ';', expecting TYPE-IDENTIFIER %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:79: Define or directive not defined: VCHANNEL_DMA_REQ %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:79: syntax error, unexpected ';', expecting TYPE-IDENTIFIER %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:80: Define or directive not defined:VCHANNEL_DMA_RESP %Error: ../src/optimsoc_networkadapter_networkadapter_ct/verilog/networkadapter_ct.v:80: syntax error, unexpected ';', expecting TYPE-IDENTIFIER %Error: ../src/optimsoc_sram_plain/verilog/wb_sram_sp.v:31: Cannot find include file: optimsoc_def.vh %Error: ../src/optimsoc_sram_plain/verilog/wb_sram_sp.v:62: Define or directive not defined: `OPTIMSOC_SRAM_IMPLEMENTATION %Error: ../src/optimsoc_sram_plain/verilog/wb_sram_sp.v:62: syntax error, unexpected ';', expecting TYPE-IDENTIFIER %Error: ../src/optimsoc_debug_system_mam_wb_adapter/verilog/mam_wb_adapter.v:44: Cannot find include file: optimsoc_def.vh %Error: ../src/optimsoc_tile_compute_tile_dm/verilog/compute_tile_dm.sv:30: Cannot find include file: optimsoc_def.vh %Error: Exiting due to 45 error(s) %Error: Command Failed /nas/ei/share/lis/tools/veripool/verilator/3.886/bin/verilator_bin --cc -f input.vc --top-module tb_compute_tile --exe -LDFLAGS ' -Wl,--start-group /nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/sim-verilator/wallento_simutil_verilator.a -Wl,--end-group ' -CFLAGS -I/nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/src/wallento_simutil_verilator/inc -CFLAGS -I/nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/sim-verilator -CFLAGS -I/nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/src /nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/src/optimsoc_examples_compute_tile_sim/tb_compute_tile.cpp '-GUSE_DEBUG=1' --trace -Wno-fatal -CFLAGS '-std=c++11' -LDFLAGS -pthread  ERROR: Failed to build simulation model ERROR: "/nfs/lis/tools/veripool/verilator/3.886/bin/verilator --cc -f input.vc --top-module tb_compute_tile --exe -LDFLAGS " -Wl,--start-group /nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/sim-verilator/wallento_simutil_verilator.a -Wl,--end-group " -CFLAGS -I/nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/src/wallento_simutil_verilator/inc -CFLAGS -I/nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/sim-verilator -CFLAGS -I/nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/src /nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/src/optimsoc_examples_compute_tile_sim/tb_compute_tile.cpp -GUSE_DEBUG=1 --trace -Wno-fatal -CFLAGS "-std=c++11" -LDFLAGS "-pthread"" exited with an error code. ERROR: See /nas/ei/home/ga73sip/test/optimsoc-sources/build/optimsoc_examples_compute_tile_sim/sim-verilator/verilator.log for details.

tools/build.py '' --with-docs --with-examples-sim --without-examples-fpga -o objdir (I) Building OpTiMSoC (I) version: 2016.1-git289711deb343+ (I) source: /nas/ei/home/ga73sip/test/optimsoc-sources (I) objdir: /nas/ei/home/ga73sip/test/optimsoc-sources/objdir (I) Build host tools (I) + utils (I) + Build (I) + Copy build artifacts (I) + optimsoc-pgm-fpga (I) + Copy build artifacts (I) Build SoC software (I) + baremetal-libs (I) + autogen (I) + Create object directory (I) + Configure (I) + Build (I) + Install build artifacts (I) Build hardware modules (I) Build and install documentation (I) + Build (I) + Install build artifacts (I) Build and install our private copy of FuseSoC (I) + Copy sources (I) + Copy ipyxact module as dependency into fusesoc (I) + Create optimsoc-fusesoc wrapper script (I) Build lisnoc (I) Copy extra_cores hardware modules (I) Copy/link GLIP hardware modules (I) Build GLIP (for host) (I) + autogen (I) + Configure (I) + Build (I) + Install build artifacts (I) Build opensocdebug host software (I) + autogen (I) + Configure (I) + Build (I) + Install build artifacts (I) Write OpTiMSoC environment file (I) Build examples (Verilator-based simulation) (I) + compute_tile_sim_singlecore (compute_tile_sim --NUM_CORES 1) (I) + Build (I) + Copy build artifacts (I) + compute_tile_sim_dualcore (compute_tile_sim --NUM_CORES 2) (I) + Build (I) + Copy build artifacts (I) + compute_tile_sim_quadcore (compute_tile_sim --NUM_CORES 4) (I) + Build (I) + Copy build artifacts (I) + system_2x2_cccc_sim_dualcore (system_2x2_cccc_sim --NUM_CORES 2) (I) + Build (I) + Copy build artifacts (I) + system_2x2_cccc_sim_dualcore_debug (system_2x2_cccc_sim --NUM_CORES 2 --USE_DEBUG 1) (I) + Build (I) + Copy build artifacts (I) Build finished. (I) All build artifacts are available at /nas/ei/home/ga73sip/test/optimsoc-sources/objdir/dist

imphil commented 8 years ago

Was ist das oben für ein log von verilator/fusesoc?

Unten

compute_tile_sim_dualcore (compute_tile_sim --NUM_CORES 2) (I) + Build (I) + Copy build artifacts

sieht man genau, dass der Build des compute tiles aus den Quellen funktioniert.

Und wo kommt die networkadapter_ct.v Datei her? Die ist in den Quellen nicht vorhanden.

Bitte überprüfe auch ob deine FUSESOC_CORES Variable richtig gesetzt ist (d.h. keine eigenen Änderungen, nur das was optimsoc-environment.sh setzt).

Acetofive commented 8 years ago

Ok, danke. Der Fehler lag daran, dass ich das optimsoc-environment.sh nach einem neuen "make" nicht ausgeführt habe.

Danke fürs Helfen.

On 10/05/2016 02:11 PM, Philipp Wagner wrote:

Was ist das oben für ein log von verilator/fusesoc?

Unten

|compute_tile_sim_dualcore (compute_tile_sim --NUM_CORES 2) (I) + Build (I) + Copy build artifacts |

sieht man genau, dass der Build des compute tiles aus den Quellen funktioniert.

Und wo kommt die networkadapter_ct.v Datei her? Die ist in den Quellen nicht vorhanden.

Bitte überprüfe auch ob deine FUSESOC_CORES Variable richtig gesetzt ist (d.h. keine eigenen Änderungen, nur das was optimsoc-environment.sh setzt).

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Acetofive commented 8 years ago

I didn't run the optimsoc-environment.sh to set the variables new after the update/make.