opulo-inc / lumenpnp

The LumenPnP is an open source pick and place machine.
GNU General Public License v3.0
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Electromagnetic Compatibility #698

Open sphawes opened 6 months ago

sphawes commented 6 months ago

Version Number

REV04

Bugfix or Enhancement

Enhancement

Description

The LumenPnP motherboard could see improvements to it's electromagnetic compatibility.

Suggested Solution

Thorough consideration for EMC issues (please leave a comment with specifics if you have thoughts in mind!):

Proposed Test List:

test-list

sphawes commented 6 months ago

The REV05b0 board has many of these considerations taken into account, but no doubt that they could be improved!

Would love any and all feedback on how these could be made better, plus things that I'm missing!

dan-gies commented 6 months ago

Copper-pour "fingers"/"antennae"

Whenever possible, avoid copper structures that are only connected at one end. These can cause problems for radiated immunity and emissions. image image image image etc...

dan-gies commented 6 months ago

Signal return paths

Since this is a 4-layer board with power planes on the inner layers, signals are constantly hopping between reference planes (GND and +3.3V). This can impact both signal integrity and EMC, since it is tough to predict the signal return-current paths. When signal return currents take a long "roundabout" path, it creates an inductive loop, deteriorating signal quality, potentially radiating emissions, and potentially becoming susceptible to incoming noise.

One example of signals transitioning from top to bottom layers, where the signals have two different return paths that aren't coupled together

image

It's easy to brush this off as "not of concern since it's not high-speed", but the STM32F407 is actually capable of decently high rise/fall-times, resulting in high frequency signal content. From the datasheet (below), rise/fall times can be set to as high as 2.5 ns, which equates to roughly a signal bandwidth of 140 MHz. This is territory where return paths start to really matter. image

Recommendations

Reduce rise/fall times whenever possible

The STM32F407 has registers to set rise/fall times (AKA "drive strength"). Use the lowest drive strength possible while maintaining good signal integrity (too low means signals aren't reaching Voh/Vol in time, depending on your bus speeds). Needlessly high rise/fall times can result in radiated emissions and on-board crosstalk.

Improve return paths

Option 1: Add a high-pass capacitor between +3.3V / GND as needed

These capacitors should be as close as possible to groupings of signal layer transitions, if there isn't already a decoupling capacitor a few cm away. The exact value can be adjusted based on rise/fall times and immunity requirements. This reduces the inductive loop area; short return paths are good.

Option 2: Use GND planes exclusively on both inner layers, route +3.3V on top/bottom, or move to 6 layer board

For this board, I'd only redo the 3.3V distribution (adding more layers or routing 3.3V on top/bottom) if there are crosstalk or EMC issues. Well defined return paths are the easiest way to avoid crosstalk and EMC problems for fast-edge signals.

JacobChrist commented 6 months ago

Your probably going to have trouble passing emissions <1GHz with the drivers so far from the motors. You need to couple the driver to the motor and use a shielded step/direction wires to get the signals to the drivers. It might be possible but I'm no an RF expert. In my previous journeys we even purchased NEMA17 motors that have shielded leads (really expensive) and still could not pass being only 30cm from the driver in a conductive housing (with big holes).

JacobChrist commented 6 months ago

Also, not sure how many layers your board is, but I would go with no less than 4 layers and make sure you have a solid ground plane under all signal traces and that any switching traces are as far from the board edge as possible (lots of ground plane between the board edge and the switching trace).

This is basically what I was thinking: https://github.com/opulo-inc/lumenpnp/issues/698#issuecomment-1877851892

My 4-layer stacks are usually: top signal inner1 ground inner2 power bottom signal

And try to never cut the ground plane and make sure that there is copper between vias (so prevent large chunks of no ground plane under signal traces)