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os-fpga / RTL_Benchmark

This repository contains the benchmarks.
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Bhavya's bcpu design added #87

Closed awaisabbas-rs closed 1 year ago

awaisabbas-rs commented 1 year ago

This design has been included to monitor any issues related to EDA-1269.

To accommodate custom runs, please make sure to modify the absolute directories in the raptor.tcl and yosys.ys files that have been added to support yosys and raptor custom runs.

Additionally, flist.flist and inc.flist files are added to streamline the integration of the design with automatic scripts, as there were too many design files and include files to manage.

awaisabbas-rs commented 1 year ago

Hi Thierry,

Yes,I have removed approximately 3.3 GB of data, leaving only 136 MB, but still it has 2507 files, currently I have deleted another ~1000 files, I will now verify the QoR results and provide you with an update.

awaisabbas-rs commented 1 year ago

Hi Thierry,

out of these 963 files, there are more than 500 files that are being used in this design, in order to filer exact files that are required required more time, If you want to remove extra 300-400 files please let me know I will plan it accordingly.

Till now I have removed thousands of files to extract the required IPs from gemini folder