search

os-fpga / yosys_verific_rs

Yosys + (Optional) Verific Integration
Other
5 stars 6 forks source link

ERROR: ERROR: couldn't find ABC executable #179

Closed nadeemyaseen-rs closed 2 years ago

nadeemyaseen-rs commented 2 years ago

I clone the latest main branch and follow the instruction as per README. See the below the output of make release

cmake -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr/local -DCMAKE_RULE_MESSAGES=off  -S . -B build
-- The C compiler identification is GNU 8.2.0
-- The CXX compiler identification is GNU 9.1.0
-- Check for working C compiler: /usr/lib64/ccache/cc
-- Check for working C compiler: /usr/lib64/ccache/cc -- works
-- Detecting C compiler ABI info
-- Detecting C compiler ABI info - done
-- Detecting C compile features
-- Detecting C compile features - done
-- Check for working CXX compiler: /usr/lib64/ccache/c++
-- Check for working CXX compiler: /usr/lib64/ccache/c++ -- works
-- Detecting CXX compiler ABI info
-- Detecting CXX compiler ABI info - done
-- Detecting CXX compile features
-- Detecting CXX compile features - done
-- Performing Test C_COMPILER_SUPPORTS__-Wall
-- Performing Test C_COMPILER_SUPPORTS__-Wall - Success
-- Performing Test CXX_COMPILER_SUPPORTS__-Wall
-- Performing Test CXX_COMPILER_SUPPORTS__-Wall - Success
-- Performing Test C_COMPILER_SUPPORTS__-Wno-unused-function
-- Performing Test C_COMPILER_SUPPORTS__-Wno-unused-function - Success
-- Performing Test CXX_COMPILER_SUPPORTS__-Wno-unused-function
-- Performing Test CXX_COMPILER_SUPPORTS__-Wno-unused-function - Success
-- Performing Test C_COMPILER_SUPPORTS__-Wno-write-strings
-- Performing Test C_COMPILER_SUPPORTS__-Wno-write-strings - Success
-- Performing Test CXX_COMPILER_SUPPORTS__-Wno-write-strings
-- Performing Test CXX_COMPILER_SUPPORTS__-Wno-write-strings - Success
-- Performing Test C_COMPILER_SUPPORTS__-Wno-sign-compare
-- Performing Test C_COMPILER_SUPPORTS__-Wno-sign-compare - Success
-- Performing Test CXX_COMPILER_SUPPORTS__-Wno-sign-compare
-- Performing Test CXX_COMPILER_SUPPORTS__-Wno-sign-compare - Success
-- Performing Test C_COMPILER_SUPPORTS__-Wno-unused-but-set-variable
-- Performing Test C_COMPILER_SUPPORTS__-Wno-unused-but-set-variable - Success
-- Performing Test CXX_COMPILER_SUPPORTS__-Wno-unused-but-set-variable
-- Performing Test CXX_COMPILER_SUPPORTS__-Wno-unused-but-set-variable - Success
-- Performing Test CXX_COMPILER_SUPPORTS_-w
-- Performing Test CXX_COMPILER_SUPPORTS_-w - Success
CMAKE_SYSTEM_NAME: Linux
-- Configuring done
-- Generating done
-- Build files have been written to: /home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build
cmake --build build -j 72
gmake[1]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[2]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[3]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[3]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
Scanning dependencies of target verific
gmake[3]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[3]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
Scanning dependencies of target de
gmake[3]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[3]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[4]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/tclmain'
gmake[5]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/verilog'
gmake[3]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[3]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
[  0%] Built target de
Scanning dependencies of target libabc
gmake[3]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[3]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[5]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/verilog'
gmake[5]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/verilog_nl'
gmake[5]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/verilog_nl'
gmake[5]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/commands'
gmake[3]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
[100%] Built target libabc
gmake[3]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
Scanning dependencies of target abc
gmake[3]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[3]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
ar: creating commands-linux.a
gmake[3]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
[100%] Built target abc
gmake[5]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/commands'
gmake[5]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/verilog'
ar: creating verilog-linux.a
gmake[5]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/verilog'
gmake[5]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/vhdl'
ar: creating vhdl-linux.a
gmake[5]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/vhdl'
gmake[5]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/hier_tree'
ar: creating hier_tree-linux.a
gmake[5]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/hier_tree'
gmake[5]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/hdl_file_sort'
ar: creating hdl_file_sort-linux.a
gmake[5]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/hdl_file_sort'
gmake[5]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/hdl_encrypt'
ar: creating hdl_encrypt-linux.a
gmake[5]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/hdl_encrypt'
gmake[5]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/verilog_nl'
veri_nl_lex.cpp: In function ‘int yy_get_next_buffer()’:
veri_nl_lex.cpp:22605:54: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
22605 |     if ((result = LexerInput((char *)buf, max_size)) < 0) \
      |         ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~
veri_nl_lex.cpp:25585:3: note: in expansion of macro ‘YY_INPUT’
25585 |   YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
      |   ^~~~~~~~
ar: creating verilog_nl-linux.a
gmake[5]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/verilog_nl'
gmake[5]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/database'
ar: creating database-linux.a
gmake[5]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/database'
gmake[5]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/util'
ar: creating util-linux.a
gmake[5]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/util'
gmake[5]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/containers'
ar: creating containers-linux.a
gmake[5]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/containers'
gmake[4]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/verific/verific-vMarch22/tclmain'
gmake[3]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
[100%] Built target verific
gmake[3]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
Scanning dependencies of target yosys
gmake[3]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[3]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[4]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/yosys'
[  0%] Building kernel/version_0c82fb7e3.cc
[  0%] Building kernel/driver.o
[  0%] Building techlibs/common/simlib_help.inc
[  0%] Building techlibs/common/simcells_help.inc
[  1%] Building kernel/rtlil.o
[  1%] Building kernel/log.o
[  2%] Building kernel/calc.o
[  2%] Building kernel/yosys.o
[  2%] Building kernel/binding.o
[  3%] Building kernel/cellaigs.o
[  3%] Building kernel/celledges.o
[  3%] Building kernel/satgen.o
[  4%] Building kernel/qcsat.o
[  4%] Building kernel/mem.o
[  4%] Building kernel/ffmerge.o
[  5%] Building kernel/ff.o
[  5%] Building kernel/fstdata.o
[  5%] Building libs/bigint/BigIntegerAlgorithms.o
[  6%] Building libs/bigint/BigInteger.o
[  6%] Building libs/bigint/BigIntegerUtils.o
[  6%] Building libs/bigint/BigUnsigned.o
[  7%] Building libs/bigint/BigUnsignedInABase.o
[  7%] Building libs/sha1/sha1.o
[  7%] Building libs/json11/json11.o
[  8%] Building libs/subcircuit/subcircuit.o
[  8%] Building libs/ezsat/ezsat.o
[  8%] Building libs/ezsat/ezminisat.o
[  9%] Building libs/minisat/Options.o
[  9%] Building libs/minisat/SimpSolver.o
[  9%] Building libs/minisat/Solver.o
[ 10%] Building libs/minisat/System.o
[ 10%] Building libs/fst/fstapi.o
[ 10%] Building libs/fst/fastlz.o
[ 11%] Building libs/fst/lz4.o
[ 11%] Building frontends/aiger/aigerparse.o
[ 11%] Building frontends/rpc/rpc_frontend.o
[ 12%] Building frontends/verific/verific.o
[ 12%] Building frontends/verific/verificsva.o
[ 12%] Building frontends/json/jsonparse.o
[ 12%] Building frontends/verilog/verilog_parser.tab.cc
[ 13%] Building frontends/verilog/preproc.o
[ 14%] Building frontends/verilog/verilog_frontend.o
[ 14%] Building frontends/verilog/const2ast.o
[ 15%] Building frontends/ast/ast.o
[ 15%] Building frontends/ast/simplify.o
[ 15%] Building frontends/ast/genrtlil.o
[ 16%] Building frontends/ast/dpicall.o
[ 16%] Building frontends/ast/ast_binding.o
[ 16%] Building frontends/blif/blifparse.o
[ 17%] Building frontends/liberty/liberty.o
[ 17%] Building frontends/rtlil/rtlil_parser.tab.cc
[ 17%] Building frontends/rtlil/rtlil_lexer.cc
[ 18%] Building frontends/rtlil/rtlil_frontend.o
[ 18%] Building passes/tests/test_autotb.o
In file included from libs/minisat/Alg.h:24,
                 from libs/minisat/Solver.cc:29:
libs/minisat/Vec.h: In instantiation of ‘void Minisat::vec<T, _Size>::capacity(Minisat::vec<T, _Size>::Size) [with T = Minisat::vec<Minisat::Solver::Watcher>; _Size = int; Minisat::vec<T, _Size>::Size = int]’:
libs/minisat/Vec.h:119:5:   required from ‘void Minisat::vec<T, _Size>::growTo(Minisat::vec<T, _Size>::Size) [with T = Minisat::vec<Minisat::Solver::Watcher>; _Size = int; Minisat::vec<T, _Size>::Size = int]’
libs/minisat/IntMap.h:48:48:   required from ‘void Minisat::IntMap<K, V, MkIndex>::reserve(K) [with K = Minisat::Lit; V = Minisat::vec<Minisat::Solver::Watcher>; MkIndex = Minisat::MkIndexLit]’
libs/minisat/SolverTypes.h:338:37:   required from ‘void Minisat::OccLists<K, Vec, Deleted, MkIndex>::init(const K&) [with K = Minisat::Lit; Vec = Minisat::vec<Minisat::Solver::Watcher>; Deleted = Minisat::Solver::WatcherDeleted; MkIndex = Minisat::MkIndexLit]’
libs/minisat/Solver.cc:134:35:   required from here
libs/minisat/Vec.h:103:33: warning: ‘void* realloc(void*, size_t)’ moving an object of non-trivially copyable type ‘class Minisat::vec<Minisat::Solver::Watcher>’; use ‘new’ and ‘delete’ instead [-Wclass-memaccess]
  103 |     ||   (((data = (T*)::realloc(data, (cap += add) * sizeof(T))) == NULL) && errno == ENOMEM) )
      |                        ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from libs/minisat/Alg.h:24,
                 from libs/minisat/Solver.cc:29:
libs/minisat/Vec.h:39:7: note: ‘class Minisat::vec<Minisat::Solver::Watcher>’ declared here
   39 | class vec {
      |       ^~~
[ 18%] Building passes/tests/test_cell.o
[ 19%] Building passes/tests/test_abcloop.o
In file included from libs/minisat/Sort.h:24,
                 from libs/minisat/SimpSolver.cc:27:
libs/minisat/Vec.h: In instantiation of ‘void Minisat::vec<T, _Size>::capacity(Minisat::vec<T, _Size>::Size) [with T = Minisat::vec<unsigned int>; _Size = int; Minisat::vec<T, _Size>::Size = int]’:
libs/minisat/Vec.h:119:5:   required from ‘void Minisat::vec<T, _Size>::growTo(Minisat::vec<T, _Size>::Size) [with T = Minisat::vec<unsigned int>; _Size = int; Minisat::vec<T, _Size>::Size = int]’
libs/minisat/IntMap.h:48:48:   required from ‘void Minisat::IntMap<K, V, MkIndex>::reserve(K) [with K = int; V = Minisat::vec<unsigned int>; MkIndex = Minisat::MkIndexDefault<int>]’
libs/minisat/SolverTypes.h:338:37:   required from ‘void Minisat::OccLists<K, Vec, Deleted, MkIndex>::init(const K&) [with K = int; Vec = Minisat::vec<unsigned int>; Deleted = Minisat::SimpSolver::ClauseDeleted; MkIndex = Minisat::MkIndexDefault<int>]’
libs/minisat/SimpSolver.cc:92:28:   required from here
libs/minisat/Vec.h:103:33: warning: ‘void* realloc(void*, size_t)’ moving an object of non-trivially copyable type ‘class Minisat::vec<unsigned int>’; use ‘new’ and ‘delete’ instead [-Wclass-memaccess]
  103 |     ||   (((data = (T*)::realloc(data, (cap += add) * sizeof(T))) == NULL) && errno == ENOMEM) )
      |                        ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from libs/minisat/Sort.h:24,
                 from libs/minisat/SimpSolver.cc:27:
libs/minisat/Vec.h:39:7: note: ‘class Minisat::vec<unsigned int>’ declared here
   39 | class vec {
      |       ^~~
[ 19%] Building passes/sat/sat.o
[ 19%] Building passes/sat/freduce.o
[ 20%] Building passes/sat/eval.o
[ 20%] Building passes/sat/sim.o
[ 20%] Building passes/sat/miter.o
[ 21%] Building passes/sat/expose.o
[ 21%] Building passes/sat/assertpmux.o
[ 21%] Building passes/sat/clk2fflogic.o
[ 22%] Building passes/sat/async2sync.o
[ 22%] Building passes/sat/supercover.o
[ 22%] Building passes/sat/fmcombine.o
[ 23%] Building passes/sat/mutate.o
[ 23%] Building passes/sat/cutpoint.o
[ 23%] Building passes/sat/fminit.o
[ 24%] Building passes/sat/qbfsat.o
[ 24%] Building passes/cmds/exec.o
[ 24%] Building passes/cmds/add.o
[ 25%] Building passes/cmds/delete.o
[ 25%] Building passes/cmds/design.o
[ 25%] Building passes/cmds/select.o
[ 26%] Building passes/cmds/show.o
[ 26%] Building passes/cmds/rename.o
[ 26%] Building passes/cmds/autoname.o
[ 27%] Building passes/cmds/connect.o
[ 27%] Building passes/cmds/scatter.o
[ 27%] Building passes/cmds/setundef.o
[ 28%] Building passes/cmds/splitnets.o
[ 28%] Building passes/cmds/stat.o
[ 28%] Building passes/cmds/setattr.o
[ 29%] Building passes/cmds/copy.o
[ 29%] Building passes/cmds/splice.o
[ 30%] Building passes/cmds/scc.o
[ 30%] Building passes/cmds/glift.o
[ 30%] Building passes/cmds/torder.o
[ 31%] Building passes/cmds/logcmd.o
[ 31%] Building passes/cmds/tee.o
[ 31%] Building passes/cmds/write_file.o
[ 32%] Building passes/cmds/connwrappers.o
[ 32%] Building passes/cmds/cover.o
[ 32%] Building passes/cmds/trace.o
[ 33%] Building passes/cmds/plugin.o
[ 33%] Building passes/cmds/check.o
[ 33%] Building passes/cmds/qwp.o
[ 34%] Building passes/cmds/edgetypes.o
[ 34%] Building passes/cmds/portlist.o
[ 34%] Building passes/cmds/chformal.o
[ 35%] Building passes/cmds/chtype.o
[ 35%] Building passes/cmds/blackbox.o
[ 35%] Building passes/cmds/ltp.o
[ 36%] Building passes/cmds/bugpoint.o
[ 36%] Building passes/cmds/scratchpad.o
[ 36%] Building passes/cmds/logger.o
[ 37%] Building passes/cmds/printattrs.o
[ 37%] Building passes/cmds/sta.o
[ 37%] Building passes/cmds/clean_zerowidth.o
[ 38%] Building passes/memory/memory.o
[ 38%] Building passes/memory/memory_dff.o
[ 38%] Building passes/memory/memory_share.o
[ 39%] Building passes/memory/memory_collect.o
[ 39%] Building passes/memory/memory_unpack.o
[ 39%] Building passes/memory/memory_bram.o
[ 40%] Building passes/memory/memory_map.o
[ 40%] Building passes/memory/memory_memx.o
[ 40%] Building passes/memory/memory_nordff.o
[ 41%] Building passes/memory/memory_narrow.o
[ 41%] Building passes/techmap/flatten.o
[ 41%] Building passes/techmap/techmap.o
[ 42%] Building passes/techmap/simplemap.o
[ 42%] Building passes/techmap/dfflibmap.o
[ 42%] Building passes/techmap/maccmap.o
[ 43%] Building passes/techmap/libparse.o
[ 43%] Building passes/techmap/abc.o
[ 43%] Building passes/techmap/abc9.o
[ 44%] Building passes/techmap/abc9_exe.o
[ 44%] Building passes/techmap/abc9_ops.o
[ 45%] Building passes/techmap/iopadmap.o
[ 45%] Building passes/techmap/clkbufmap.o
[ 45%] Building passes/techmap/hilomap.o
[ 46%] Building passes/techmap/extract.o
[ 46%] Building passes/techmap/extract_fa.o
[ 46%] Building passes/techmap/extract_counter.o
[ 47%] Building passes/techmap/extract_reduce.o
[ 47%] Building passes/techmap/alumacc.o
[ 47%] Building passes/techmap/dffinit.o
[ 48%] Building passes/techmap/pmuxtree.o
[ 48%] Building passes/techmap/bmuxmap.o
[ 48%] Building passes/techmap/demuxmap.o
[ 49%] Building passes/techmap/muxcover.o
[ 49%] Building passes/techmap/aigmap.o
[ 49%] Building passes/techmap/tribuf.o
[ 50%] Building passes/techmap/lut2mux.o
[ 50%] Building passes/techmap/nlutmap.o
[ 50%] Building passes/techmap/shregmap.o
[ 51%] Building passes/techmap/deminout.o
[ 51%] Building passes/techmap/insbuf.o
[ 51%] Building passes/techmap/attrmvcp.o
[ 52%] Building passes/techmap/attrmap.o
[ 52%] Building passes/techmap/zinit.o
[ 52%] Building passes/techmap/dfflegalize.o
[ 53%] Building passes/techmap/dffunmap.o
[ 53%] Building passes/techmap/flowmap.o
[ 53%] Building passes/techmap/extractinv.o
[ 53%] Building passes/pmgen/test_pmgen_pm.h
[ 53%] Building passes/pmgen/ice40_dsp_pm.h
[ 53%] Building passes/pmgen/peepopt_pm.h
[ 53%] Building passes/pmgen/xilinx_srl_pm.h
[ 54%] Building passes/pmgen/ice40_dsp.o
[ 54%] Building passes/pmgen/ice40_wrapcarry_pm.h
[ 54%] Building passes/pmgen/xilinx_dsp_pm.h
[ 54%] Building passes/pmgen/xilinx_dsp48a_pm.h
[ 54%] Building passes/pmgen/xilinx_dsp_CREG_pm.h
[ 54%] Building passes/pmgen/xilinx_dsp_cascade_pm.h
[ 55%] Building passes/pmgen/peepopt.o
[ 55%] Building passes/pmgen/xilinx_srl.o
[ 56%] Building passes/opt/opt.o
[ 56%] Building passes/opt/opt_merge.o
[ 56%] Building passes/opt/opt_mem.o
[ 57%] Building passes/opt/opt_mem_feedback.o
[ 57%] Building passes/opt/opt_mem_priority.o
[ 57%] Building passes/opt/opt_mem_widen.o
[ 58%] Building passes/opt/opt_muxtree.o
[ 58%] Building passes/opt/opt_reduce.o
[ 58%] Building passes/opt/opt_dff.o
[ 59%] Building passes/opt/opt_share.o
[ 59%] Building passes/opt/opt_clean.o
[ 60%] Building passes/opt/opt_expr.o
[ 60%] Building passes/opt/share.o
[ 60%] Building passes/opt/wreduce.o
[ 61%] Building passes/opt/opt_demorgan.o
[ 61%] Building passes/opt/rmports.o
[ 61%] Building passes/opt/opt_lut.o
[ 62%] Building passes/opt/opt_lut_ins.o
[ 62%] Building passes/opt/pmux2shiftx.o
[ 62%] Building passes/opt/muxpack.o
[ 63%] Building passes/hierarchy/hierarchy.o
[ 63%] Building passes/hierarchy/uniquify.o
[ 63%] Building passes/hierarchy/submod.o
[ 64%] Building passes/equiv/equiv_make.o
[ 64%] Building passes/equiv/equiv_miter.o
[ 64%] Building passes/equiv/equiv_simple.o
[ 65%] Building passes/equiv/equiv_status.o
[ 65%] Building passes/equiv/equiv_add.o
[ 65%] Building passes/equiv/equiv_remove.o
[ 66%] Building passes/equiv/equiv_induct.o
[ 66%] Building passes/equiv/equiv_struct.o
[ 66%] Building passes/equiv/equiv_purge.o
[ 67%] Building passes/equiv/equiv_mark.o
[ 67%] Building passes/equiv/equiv_opt.o
[ 67%] Building passes/fsm/fsm.o
[ 68%] Building passes/fsm/fsm_detect.o
[ 68%] Building passes/fsm/fsm_extract.o
[ 68%] Building passes/fsm/fsm_opt.o
[ 69%] Building passes/fsm/fsm_expand.o
[ 69%] Building passes/fsm/fsm_recode.o
[ 69%] Building passes/fsm/fsm_info.o
[ 70%] Building passes/fsm/fsm_export.o
[ 70%] Building passes/fsm/fsm_map.o
[ 70%] Building passes/proc/proc.o
[ 71%] Building passes/proc/proc_prune.o
[ 71%] Building passes/proc/proc_clean.o
kernel/satgen.cc: In member function ‘bool Yosys::SatGen::importCell(Yosys::RTLIL::Cell*, int)’:
kernel/satgen.cc:1237:32: warning: ‘undef_srst’ may be used uninitialized in this function [-Wmaybe-uninitialized]
 1237 |      std::tie(d, undef_d) = mux(srst, undef_srst, rval, undef_rval, d, undef_d);
      |                             ~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
kernel/satgen.cc:1223:32: warning: ‘undef_ce’ may be used uninitialized in this function [-Wmaybe-uninitialized]
 1223 |      std::tie(d, undef_d) = mux(ce, undef_ce, d, undef_d, old_q, undef_old_q);
      |                             ~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
kernel/satgen.cc:1209:32: warning: ‘undef_srst’ may be used uninitialized in this function [-Wmaybe-uninitialized]
 1209 |      std::tie(d, undef_d) = mux(srst, undef_srst, rval, undef_rval, d, undef_d);
      |                             ~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
[ 71%] Building passes/proc/proc_rmdead.o
[ 72%] Building passes/proc/proc_init.o
[ 72%] Building passes/proc/proc_arst.o
[ 72%] Building passes/proc/proc_mux.o
[ 73%] Building passes/proc/proc_dlatch.o
[ 73%] Building passes/proc/proc_dff.o
[ 73%] Building passes/proc/proc_memwr.o
[ 74%] Building backends/jny/jny.o
[ 74%] Building backends/firrtl/firrtl.o
[ 75%] Building backends/simplec/simplec.o
[ 75%] Building backends/edif/edif.o
[ 75%] Building backends/cxxrtl/cxxrtl_backend.o
[ 76%] Building backends/aiger/aiger.o
[ 76%] Building backends/aiger/xaiger.o
[ 76%] Building backends/table/table.o
[ 77%] Building backends/btor/btor.o
[ 77%] Building backends/intersynth/intersynth.o
[ 77%] Building backends/json/json.o
[ 78%] Building backends/verilog/verilog_backend.o
[ 78%] Building backends/smv/smv.o
[ 78%] Building backends/blif/blif.o
[ 79%] Building backends/rtlil/rtlil_backend.o
[ 79%] Building backends/smt2/smt2.o
[ 79%] Building backends/spice/spice.o
[ 80%] Building techlibs/easic/synth_easic.o
[ 80%] Building techlibs/xilinx/synth_xilinx.o
[ 80%] Building techlibs/xilinx/xilinx_dffopt.o
[ 81%] Building techlibs/common/synth.o
[ 81%] Building techlibs/common/prep.o
[ 81%] Building techlibs/ice40/synth_ice40.o
[ 82%] Building techlibs/ice40/ice40_braminit.o
[ 82%] Building techlibs/ice40/ice40_opt.o
[ 82%] Building techlibs/nexus/synth_nexus.o
[ 83%] Building techlibs/machxo2/synth_machxo2.o
[ 83%] Building techlibs/intel/synth_intel.o
[ 83%] Building techlibs/ecp5/synth_ecp5.o
[ 84%] Building techlibs/ecp5/ecp5_gsr.o
[ 84%] Building techlibs/coolrunner2/synth_coolrunner2.o
[ 84%] Building techlibs/coolrunner2/coolrunner2_sop.o
[ 85%] Building techlibs/coolrunner2/coolrunner2_fixup.o
[ 85%] Building techlibs/efinix/synth_efinix.o
[ 85%] Building techlibs/efinix/efinix_fixcarry.o
[ 86%] Building techlibs/intel_alm/synth_intel_alm.o
[ 86%] Building techlibs/gatemate/synth_gatemate.o
[ 86%] Building techlibs/anlogic/synth_anlogic.o
[ 87%] Building techlibs/anlogic/anlogic_eqn.o
[ 87%] Building techlibs/anlogic/anlogic_fixcarry.o
[ 87%] Building techlibs/greenpak4/synth_greenpak4.o
[ 88%] Building techlibs/greenpak4/greenpak4_dffinv.o
[ 88%] Building techlibs/achronix/synth_achronix.o
[ 88%] Building techlibs/quicklogic/synth_quicklogic.o
[ 89%] Building techlibs/gowin/synth_gowin.o
[ 89%] Building techlibs/sf2/synth_sf2.o
[ 99%] Building yosys-config
[ 99%] Building passes/techmap/filterlib.o
[ 99%] Building yosys-smtbmc
[ 99%] Building share/include/kernel/yosys.h
[ 99%] Building share/include/kernel/hashlib.h
[ 99%] Building share/include/kernel/log.h
[ 99%] Building share/include/kernel/rtlil.h
[ 99%] Building share/include/kernel/binding.h
[ 99%] Building share/include/kernel/register.h
[ 99%] Building share/include/kernel/celltypes.h
[ 99%] Building share/include/kernel/celledges.h
[ 99%] Building share/include/kernel/consteval.h
[ 99%] Building share/include/kernel/constids.inc
[ 99%] Building share/include/kernel/sigtools.h
[ 99%] Building share/include/kernel/modtools.h
[ 99%] Building share/include/kernel/macc.h
[ 99%] Building share/include/kernel/utils.h
[ 99%] Building share/include/kernel/satgen.h
[ 99%] Building share/include/kernel/qcsat.h
[ 99%] Building share/include/kernel/ff.h
[ 99%] Building share/include/kernel/ffinit.h
[ 99%] Building share/include/kernel/fstdata.h
[ 99%] Building share/include/kernel/mem.h
[ 99%] Building share/include/libs/ezsat/ezsat.h
[ 99%] Building share/include/libs/ezsat/ezminisat.h
[ 99%] Building share/include/libs/fst/fstapi.h
[ 99%] Building share/include/libs/sha1/sha1.h
[ 99%] Building share/include/libs/json11/json11.hpp
[ 99%] Building share/include/passes/fsm/fsmdata.h
[ 99%] Building share/include/frontends/ast/ast.h
[ 99%] Building share/include/frontends/ast/ast_binding.h
[ 99%] Building share/include/frontends/blif/blifparse.h
[ 99%] Building share/include/backends/rtlil/rtlil_backend.h
[ 99%] Building share/include/backends/cxxrtl/cxxrtl.h
[ 99%] Building share/include/backends/cxxrtl/cxxrtl_vcd.h
[ 99%] Building share/include/backends/cxxrtl/cxxrtl_capi.cc
[ 99%] Building share/include/backends/cxxrtl/cxxrtl_capi.h
[ 99%] Building share/include/backends/cxxrtl/cxxrtl_vcd_capi.cc
[ 99%] Building share/include/backends/cxxrtl/cxxrtl_vcd_capi.h
[ 99%] Building share/verific
[ 99%] Building share/python3/smtio.py
[ 99%] Building share/xilinx/cells_map.v
[ 99%] Building share/xilinx/cells_sim.v
[ 99%] Building share/xilinx/cells_xtra.v
[ 99%] Building share/xilinx/xc2v_brams.txt
[ 99%] Building share/xilinx/xc2v_brams_map.v
[ 99%] Building share/xilinx/xc3sa_brams.txt
[ 99%] Building share/xilinx/xc3sda_brams.txt
[ 99%] Building share/xilinx/xc6s_brams.txt
[ 99%] Building share/xilinx/xc6s_brams_map.v
[ 99%] Building share/xilinx/xc7_xcu_brams.txt
[ 99%] Building share/xilinx/xc7_brams_map.v
[ 99%] Building share/xilinx/xcu_brams_map.v
[ 99%] Building share/xilinx/xcup_urams.txt
[ 99%] Building share/xilinx/xcup_urams_map.v
[ 99%] Building share/xilinx/lut4_lutrams.txt
[ 99%] Building share/xilinx/lut6_lutrams.txt
[ 99%] Building share/xilinx/lutrams_map.v
[ 99%] Building share/xilinx/arith_map.v
[ 99%] Building share/xilinx/ff_map.v
[ 99%] Building share/xilinx/lut_map.v
[ 99%] Building share/xilinx/mux_map.v
[ 99%] Building share/xilinx/xc3s_mult_map.v
[ 99%] Building share/xilinx/xc3sda_dsp_map.v
[ 99%] Building share/xilinx/xc6s_dsp_map.v
[ 99%] Building share/xilinx/xc4v_dsp_map.v
[ 99%] Building share/xilinx/xc5v_dsp_map.v
[ 99%] Building share/xilinx/xc7_dsp_map.v
[ 99%] Building share/xilinx/xcu_dsp_map.v
[ 99%] Building share/xilinx/abc9_model.v
[ 99%] Building techlibs/xilinx/brams_init.mk
[ 99%] Building share/simlib.v
[ 99%] Building share/simcells.v
[ 99%] Building share/techmap.v
[ 99%] Building share/pmux2mux.v
[ 99%] Building share/adff2dff.v
[ 99%] Building share/dff2ff.v
[ 99%] Building share/gate2lut.v
[ 99%] Building share/cmp2lut.v
[ 99%] Building share/cells.lib
[ 99%] Building share/mul2dsp.v
[ 99%] Building share/abc9_model.v
[ 99%] Building share/abc9_map.v
[ 99%] Building share/abc9_unmap.v
[ 99%] Building share/cmp2lcu.v
[ 99%] Building share/ice40/arith_map.v
[ 99%] Building share/ice40/cells_map.v
[ 99%] Building share/ice40/ff_map.v
[ 99%] Building share/ice40/cells_sim.v
[ 99%] Building share/ice40/latches_map.v
[ 99%] Building share/ice40/brams.txt
[ 99%] Building share/ice40/brams_map.v
[ 99%] Building share/ice40/dsp_map.v
[ 99%] Building share/ice40/abc9_model.v
[ 99%] Building techlibs/ice40/brams_init.mk
[ 99%] Building share/nexus/cells_map.v
[ 99%] Building share/nexus/cells_sim.v
[ 99%] Building share/nexus/parse_init.vh
[ 99%] Building share/nexus/cells_xtra.v
[ 99%] Building share/nexus/lutrams_map.v
[ 99%] Building share/nexus/lutrams.txt
[ 99%] Building share/nexus/brams_init.vh
[ 99%] Building share/nexus/brams_map.v
[ 99%] Building share/nexus/brams.txt
[ 99%] Building share/nexus/lrams_init.vh
[ 99%] Building share/nexus/lrams_map.v
[ 99%] Building share/nexus/lrams.txt
[ 99%] Building share/nexus/arith_map.v
[ 99%] Building share/nexus/latches_map.v
[ 99%] Building share/nexus/dsp_map.v
[ 99%] Building share/machxo2/cells_map.v
[ 99%] Building share/machxo2/cells_sim.v
[ 99%] Building share/intel/common/m9k_bb.v
[ 99%] Building share/intel/common/altpll_bb.v
[ 99%] Building share/intel/common/brams_m9k.txt
[ 99%] Building share/intel/common/brams_map_m9k.v
[ 99%] Building share/intel/common/ff_map.v
[ 99%] Building share/intel/max10/cells_sim.v
[ 99%] Building share/intel/cyclone10lp/cells_sim.v
[ 99%] Building share/intel/cycloneiv/cells_sim.v
[ 99%] Building share/intel/cycloneive/cells_sim.v
[ 99%] Building share/intel/max10/cells_map.v
[ 99%] Building share/intel/cyclone10lp/cells_map.v
[ 99%] Building share/intel/cycloneiv/cells_map.v
[ 99%] Building share/intel/cycloneive/cells_map.v
[ 99%] Building share/ecp5/cells_ff.vh
[ 99%] Building share/ecp5/cells_io.vh
[ 99%] Building share/ecp5/cells_map.v
[ 99%] Building share/ecp5/cells_sim.v
[ 99%] Building share/ecp5/cells_bb.v
[ 99%] Building share/ecp5/lutrams_map.v
[ 99%] Building share/ecp5/lutrams.txt
[ 99%] Building share/ecp5/brams_map.v
[ 99%] Building share/ecp5/brams.txt
[ 99%] Building share/ecp5/arith_map.v
[ 99%] Building share/ecp5/latches_map.v
[ 99%] Building share/ecp5/dsp_map.v
[ 99%] Building techlibs/ecp5/brams_init.mk
[ 99%] Building techlibs/ecp5/brams_connect.mk
[ 99%] Building share/coolrunner2/cells_latch.v
[ 99%] Building share/coolrunner2/cells_sim.v
[ 99%] Building share/coolrunner2/cells_counter_map.v
[ 99%] Building share/coolrunner2/tff_extract.v
[ 99%] Building share/coolrunner2/xc2_dff.lib
[ 99%] Building share/efinix/cells_map.v
[ 99%] Building share/efinix/arith_map.v
[ 99%] Building share/efinix/cells_sim.v
[ 99%] Building share/efinix/brams_map.v
[ 99%] Building share/efinix/gbuf_map.v
[ 99%] Building share/efinix/brams.txt
[ 99%] Building share/intel_alm/common/abc9_map.v
[ 99%] Building share/intel_alm/common/abc9_unmap.v
[ 99%] Building share/intel_alm/common/abc9_model.v
[ 99%] Building share/intel_alm/common/alm_map.v
[ 99%] Building share/intel_alm/common/alm_sim.v
[ 99%] Building share/intel_alm/common/arith_alm_map.v
[ 99%] Building share/intel_alm/common/dff_map.v
[ 99%] Building share/intel_alm/common/dff_sim.v
[ 99%] Building share/intel_alm/common/dsp_sim.v
[ 99%] Building share/intel_alm/common/dsp_map.v
[ 99%] Building share/intel_alm/common/mem_sim.v
[ 99%] Building share/intel_alm/common/misc_sim.v
[ 99%] Building share/intel_alm/cyclonev/cells_sim.v
[ 99%] Building share/intel_alm/common/bram_m10k.txt
[ 99%] Building share/intel_alm/common/bram_m10k_map.v
[ 99%] Building share/intel_alm/common/bram_m20k.txt
[ 99%] Building share/intel_alm/common/bram_m20k_map.v
[ 99%] Building share/intel_alm/common/lutram_mlab.txt
[ 99%] Building share/intel_alm/common/megafunction_bb.v
[ 99%] Building share/intel_alm/common/quartus_rename.v
[ 99%] Building share/gatemate/reg_map.v
[ 99%] Building share/gatemate/mux_map.v
[ 99%] Building share/gatemate/lut_map.v
[ 99%] Building share/gatemate/mul_map.v
[ 99%] Building share/gatemate/arith_map.v
[ 99%] Building share/gatemate/cells_sim.v
[ 99%] Building share/gatemate/cells_bb.v
[ 99%] Building share/gatemate/brams_map.v
[ 99%] Building share/gatemate/brams.txt
[ 99%] Building share/gatemate/brams_init_20.vh
[ 99%] Building share/gatemate/brams_init_40.vh
[ 99%] Building share/anlogic/cells_map.v
[ 99%] Building share/anlogic/arith_map.v
[ 99%] Building share/anlogic/cells_sim.v
[ 99%] Building share/anlogic/eagle_bb.v
[ 99%] Building share/anlogic/lutrams.txt
[ 99%] Building share/anlogic/lutrams_map.v
[ 99%] Building share/anlogic/lutram_init_16x4.vh
[ 99%] Building share/anlogic/brams.txt
[ 99%] Building share/anlogic/brams_map.v
passes/techmap/abc.cc: In member function ‘virtual void {anonymous}::AbcPass::execute(std::vector<std::__cxx11::basic_string<char> >, Yosys::RTLIL::Design*)’:
passes/techmap/abc.cc:1947:15: warning: ‘g_argidx’ may be used uninitialized in this function [-Wmaybe-uninitialized]
 1947 |      cmd_error(args, g_argidx, stringf("Unsupported gate type: %s", g.c_str()));
      |      ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
[ 99%] Building techlibs/anlogic/brams_init.mk
[ 99%] Building share/greenpak4/cells_blackbox.v
[ 99%] Building share/greenpak4/cells_latch.v
[ 99%] Building share/greenpak4/cells_map.v
[ 99%] Building share/greenpak4/cells_sim.v
[ 99%] Building share/greenpak4/cells_sim_ams.v
[ 99%] Building share/greenpak4/cells_sim_digital.v
[ 99%] Building share/greenpak4/cells_sim_wip.v
[ 99%] Building share/greenpak4/gp_dff.lib
[ 99%] Building share/achronix/speedster22i/cells_sim.v
[ 99%] Building share/achronix/speedster22i/cells_map.v
[ 99%] Building share/quicklogic/pp3_ffs_map.v
[ 99%] Building share/quicklogic/pp3_lut_map.v
[ 99%] Building share/quicklogic/pp3_latches_map.v
[ 99%] Building share/quicklogic/pp3_cells_map.v
[ 99%] Building share/quicklogic/cells_sim.v
[ 99%] Building share/quicklogic/lut_sim.v
[ 99%] Building share/quicklogic/pp3_cells_sim.v
[ 99%] Building share/quicklogic/abc9_model.v
[ 99%] Building share/quicklogic/abc9_map.v
[ 99%] Building share/quicklogic/abc9_unmap.v
[ 99%] Building share/gowin/cells_map.v
[ 99%] Building share/gowin/cells_sim.v
[ 99%] Building share/gowin/arith_map.v
[ 99%] Building share/gowin/brams_map.v
[ 99%] Building share/gowin/brams.txt
[ 99%] Building share/gowin/lutrams_map.v
[ 99%] Building share/gowin/lutrams.txt
[ 99%] Building share/gowin/brams_init3.vh
[ 99%] Building techlibs/gowin/brams_init.mk
[ 99%] Building share/sf2/arith_map.v
[ 99%] Building share/sf2/cells_map.v
[ 99%] Building share/sf2/cells_sim.v
[ 99%] Building kernel/version_0c82fb7e3.o
[ 99%] Building kernel/register.o
[ 99%] Building frontends/verilog/verilog_parser.tab.o
[ 99%] Building frontends/verilog/verilog_lexer.cc
[ 99%] Building frontends/rtlil/rtlil_parser.tab.o
[ 99%] Building frontends/rtlil/rtlil_lexer.o
[ 99%] Building passes/pmgen/test_pmgen.o
[ 99%] Building passes/pmgen/ice40_wrapcarry.o
[ 99%] Building passes/pmgen/xilinx_dsp.o
[ 99%] Building yosys-filterlib
[ 99%] Building share/xilinx/brams_init_36.vh
[ 99%] Building share/xilinx/brams_init_32.vh
[ 99%] Building share/xilinx/brams_init_18.vh
[ 99%] Building share/xilinx/brams_init_16.vh
[ 99%] Building share/xilinx/brams_init_9.vh
[ 99%] Building share/xilinx/brams_init_8.vh
[ 99%] Building share/ice40/brams_init1.vh
[ 99%] Building share/ice40/brams_init2.vh
[ 99%] Building share/ice40/brams_init3.vh
[ 99%] Building share/ecp5/bram_init_1_2_4.vh
[ 99%] Building share/ecp5/bram_init_9_18_36.vh
[ 99%] Building share/ecp5/bram_conn_1.vh
[ 99%] Building share/ecp5/bram_conn_2.vh
[ 99%] Building share/ecp5/bram_conn_4.vh
[ 99%] Building share/ecp5/bram_conn_9.vh
[ 99%] Building share/ecp5/bram_conn_18.vh
[ 99%] Building share/ecp5/bram_conn_36.vh
[ 99%] Building share/anlogic/brams_init_16.vh
[ 99%] Building share/anlogic/brams_init_9.vh
[ 99%] Building share/anlogic/brams_init_8.vh
[ 99%] Building share/gowin/bram_init_16.vh
[ 99%] Building frontends/verilog/verilog_lexer.o
frontends/verilog/verilog_lexer.l: In function ‘int frontend_verilog_yylex(FRONTEND_VERILOG_YYSTYPE*, FRONTEND_VERILOG_YYLTYPE*)’:
frontends/verilog/verilog_lexer.cc:199:36: warning: comparison of integer expressions of different signedness: ‘int’ and ‘yy_size_t’ {aka ‘long unsigned int’} [-Wsign-compare]
  199 |                 for ( yyl = n; yyl < frontend_verilog_yyleng; ++yyl )\
      |                                ~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
frontends/verilog/verilog_lexer.cc:210:9: note: in expansion of macro ‘YY_LESS_LINENO’
  210 |         YY_LESS_LINENO(yyless_macro_arg);\
      |         ^~~~~~~~~~~~~~
frontends/verilog/verilog_lexer.l:418:3: note: in expansion of macro ‘yyless’
  418 |   yyless(len);
      |   ^~~~~~
[100%] Building yosys
gmake[4]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/yosys'
gmake[3]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
[100%] Built target yosys
gmake[3]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
Scanning dependencies of target yosys-rs-plugin
gmake[3]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[3]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[4]: Entering directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/yosys-rs-plugin'
gmake[4]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/yosys-rs-plugin'
gmake[3]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
[100%] Built target yosys-rs-plugin
gmake[2]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
gmake[1]: Leaving directory `/home/users/eda_tools/opensource/yosys_verifc/yosys_verific_rs/build'
nadeemyaseen-rs commented 2 years ago

On invoking yosys, faced the error


[khyber.runner@khyber bin]$ ./yosys

 /----------------------------------------------------------------------------\
 |                                                                            |
 |  yosys -- Yosys Open SYnthesis Suite                                       |
 |                                                                            |
 |  Copyright (C) 2012 - 2020  Claire Xenia Wolf <claire@yosyshq.com>         |
 |                                                                            |
 |  Permission to use, copy, modify, and/or distribute this software for any  |
 |  purpose with or without fee is hereby granted, provided that the above    |
 |  copyright notice and this permission notice appear in all copies.         |
 |                                                                            |
 |  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES  |
 |  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF          |
 |  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR   |
 |  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES    |
 |  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN     |
 |  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF   |
 |  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.            |
 |                                                                            |
 \----------------------------------------------------------------------------/

 Yosys 0.16+6 (git sha1 0c82fb7e3, gcc 9.1.0 -fPIC -Os)

ERROR: ERROR: couldn't find ABC executable
aram-rs commented 2 years ago

Hi @nadeemyaseen-rs,

In order to run Yosys without installing it we should export some environment variables (ABC, DE, LSORACLE), I have updated the readme to reflect these requirement with #181 PR.

source scripts/export_env.sh

Could you please retest ?

nadeemyaseen-rs commented 2 years ago

Thanks. issue is resolved