Feature arrays can only be declared for abstract, thread, device, bus, data, memory, system and processor classifiers.

[brlarson]

Need port array for process classifiers too: process CommSubstrate features publish : in event data port [QoS::X]; end CommSubstrate;

Otherwise, how am I to connect to the thread port arrays within?

[lwrage]

It's specified like that in the standard (except abstract, which is missing there).

[brlarson]

Thanks, Lutz.

I wonder how that can be. Can I have port arrays within feature groups and sneak them through process that way?

[lwrage]

When you write a connection (in AADLv2.1) you don't indicate array indices. If this has changed, then I don't know how this is supposed to work.

[reteprelief]

Brian,

when we did the arrays in AADL V2 we settled on the following approach: You can specify arrays of subcomponents at any level of the system hierarchy, e.g., and array of processes in a system, where the process itself contains an array of threads. When looking at this specification from the instance model perspective you have just defined a two-dimensional array of thread instances. When you declare a connection from such a thread array we tired to avoid exposing the fact that an array is inside in the interface, i.e., you just connect the subcomponent port to a port of the enclosing component, e.g., a process port. When dealing with the instance model you then apply the concept of connection pattern to specify how different elements of the sending array get connected to different elements of the receiving array. In that context we support feature array at the leaf level of the hierarchy, i.e., one dimension of the sending array can get mapped into a feature array, e.g., a voter. You can also specify a connection set, i.e., you list explicitly how indices from the sending array get mapped into indices of the receiving array, the general idea being that this may be generated by some tool.

Brian has been asking for the ability to declare connections by specifying the index on each end. This works ok for simple cases but this gets us into the business of exposing the dimensions and their sizes up the hierarchy and requires clarification as to whether the indices can only be specified at the top, i.e., the connection declaration between two subcomponents, or also when declaring the mapping (connection) of ports up and down the hierarchy. In the latter case things can get tricky if each declaration declaration of a full semantic connection specifies its own index mapping and I have been looking for someone to works this out as a clean solution.