DO NOT MERGE - 3D case from Anool

[pdp7]

From Hackaday chat with @Anool

I found an error on the TFT ribbon cable connector footprint, which was preventing VRML export. And another error in the footprint for IC U5 The error on IC U5 footprint was from a prior merge, so better be careful with merges I haven't changed or touched the schematic or the track layout. TFT1 and U5 were updated in Library as well as on the .kicad_pcb

I need to figure out how to avoid any changes to the layout when merging this