Open bmentink opened 2 years ago
How the board performs a reset is something that is specific to the FPGA family, so we opt to pass this signal as an output from the usb_dfu_core
module so that the top level module can handle it. Most likely you have a bug in the handling of this signal for your board.
This signal has been tested on the Logicbone, TinyFPGA, and Arty-A7 targets.
Hi,
I was looking through usb/usb_dfu_ctrl_ep.v to determin why I am not able to boot the application for the logicbone target. In the following section:
The register
dfu_detach
is set to "1" on two conditions, but is not used anywhere in the code ... is this a bug?Has the logicbone board port actually been tested, and determined "running"?