CDONE needs to be tied high and SPI flash boot mode

[osresearch]

According to the ice40 programming guide CDONE has to be tied high with a 2.7K resistor, and SPI_SS_B should have a 10K pullup.

[osresearch]

• FPGA is in SPI controller mode
• SPI_SO is output from the FPGA. connects to flash MOSI
• SPI_SI is input to the FPGA, connects to flash MISO
• SPI_SS_B has 10k pullup

[osresearch]

Fixed in v0 tag prior to ordering.