v0 board issues

[osresearch]

Critical:

• [x] Pin 35 can't be used when the PLL is in use. This breaks the i2c input on the current design.

Minor:

• [x] L1 is too close to cap on the top
• [x] Reset and SW1 should be brought to the headers
• [x] Two One IOs are not routed out (gpio 35 is unusable)
• [ ] USB footprint isn't quite right
• [ ] USB resistors are on the top; move to bottom?
• [ ] Add a clock?
• [ ] Reduce size of paste window under ice40

Production:

• [x] Make sure to order ENIG plating!
• [ ] 1.2mm thick PCB
• [x] Smaller stencil size

[cibomahto]

My suggestions:

• Change button type to 'TS-1185-C-A-A': https://www.lcsc.com/product-detail/Others_XKB-TS-1185-C-A-A_C318896.html (slightly larger but more robust/very common)
• Change USB type to 'MICRO XNJ ZB' https://www.lcsc.com/product-detail/USB-Connectors_SHOU-HAN-MICRO-XNJ-ZB_C668587.html (this works with the current footprint?)
• Suggest 2520 oscillator package size, for example: https://www.lcsc.com/product-detail/Oscillators_Yangxing-Tech-OT252012MJBA4SL_C669073.html
• Leave USB resistors on top side (keep USB lines on a single plane to avoid discontinuities)
• Consider if the other end of the I2C pins are being pulled up to 5V, which would make a voltage conflict.

[osresearch]

Thanks for the suggestions!

Software patches are being developed in https://github.com/osresearch/pixel-wrangler/tree/v0-fixes

To make the bit stream build the inout hdmi_sda has to be not included in the top module, and a separate pin needs to be assigned from one of the gpio banks. A bodge wire is needed from the HDMI SDA pin to that GPIO. Hopefully having a signal on gpio 35 won't cause any PLL related problems.

[osresearch]

the PLL power supply should be checked to see if matches the app note https://www.latticesemi.com/-/media/LatticeSemi/Documents/ApplicationNotes/IK2/FPGA-TN-02052-1-4-iCE40-sysCLOCK-PLL-Design-User-Guide.ashx?document_id=47778

[osresearch]

For the i2c pullups, perhaps using a device-side version of the TPD12S016 "HDMI Companion chip" would be a good idea. It adds ESD protection on all eight differential pairs, i2c level shifting, etc.

Update: the HDMI i2c lines are pulledup to 4-ish volts, so it's lucky that nothing has been damaged yet. The source side are probably 100k based on the what other people have written about the spec.

[osresearch]

After soldering a jumper from the SDA pullup resistor to GPIO 0 7, the i2c works and the laptop negotiates with the display. All three channel decode works. Green is inverted on schematic, but doesn't get inverted in the verilog? Something seems wrong with that.

[osresearch]

I forgot to check all the replies to this issue and forgot to change the switch or USB footprints. I did fix the i2c connections and moved everything to one side for easier manufacturing.

Aisler is doing the prototype and they only have thick PCBs.

[osresearch]

And some v2 board issues:

The biggest:

• The v2 boards won't sync up their PLL, so they never get the video (maybe the througholes are a bad idea)
• Maybe this is a bad idea and it should just use an HDMI chip

And some other ones:

• Not having an oscillator means that free running video outputs have some shimmer (on v0 and v2).
• Buttons are still too hard to press
• USB micro rips off sometimes
• Initial program load is a problem; have to figure out how to make it work on populated boards
• Boot loader doesn't time out and start video automatically
• Boot loader metadata isn't populated correctly