search

ovpanait / zynq-aes

AES hardware engine for Xilinx Zynq platform
MIT License
27 stars 10 forks source link

about smartconnect and interconnect #2

Closed 55-AA closed 4 years ago

55-AA commented 4 years ago

In this project, I use a AXI interconnect replace the AXI smartconnect, the result output is identical. But the LUT consumed by AXI interface reduced from 7000+ to 3000+. Why don't you use interconnect, Although the official documents recommend the smart-connect.

ovpanait commented 4 years ago

Hi @55-AA and thanks for your interest in this project!

Indeed, for small complexity designs such as this one, there is no real benefit in using SmartConnect, and the area utilization for the interconnect IP doubles. I will commit a fix switching to AXI Interconnect. Thanks for pointing this out!

Ovidiu