Open cbiffle opened 1 year ago
FWIW, if someone decides to dig into this, my suspicion is that the read loop needs to be checking the TEF bit in SR instead of only watching for the "happy condition" bits. So I think currently in the event of a transfer error we've got an unconditional infinite loop.
If the QSPI driver / auxflash task think they have a much larger chip than they actually have, they may issue out-of-range requests, which appears to stall the driver.
The bringup team patched the size and moved on, so I don't have a lot of diagnostic information to include here, but the driver winds up hanging in this loop waiting for interrupts here: https://github.com/oxidecomputer/hubris/blob/2df5f323963423b322d1a42a02f1cc0cc433ca52/drv/stm32h7-qspi/src/lib.rs#L286
That commit should repro the issue on a stock B-rev Sidecar with an erased auxflash, if anyone wants to dig into it.