Closed hesingh closed 1 year ago
The only way in which PNA assumes that the data plane supports a timer is for the idle timeout behavior of tables.
A P4 target device can support idle timeout behavior WITHOUT exposing the timer functionality to the P4 developer, and making it available from a P4 control.
If a P4 target device has limits on HOW MANY P4 tables are allowed to use the idle timeout behavior, that is device-specific, and the device's P4 compiler should reject any P4 programs that try to use more such tables than the device supports.
A device's documentation should ideally document any limits it has in such an area, and many others.
Good clarifications, thanks. What about TCP timers to maintain state? Doesn't cpu offload TCP termination to nic in many products?
Whether a NIC implements TCP termination or not is target-specific, and currently not even mentioned in the PNA spec as a required feature. Whether and how that feature is exposed to P4 developers is thus target-specific.
Ok, got it, thanks.
So far PNA assumes the data plane supports a timer, but a timer is not defined as an extern. If not defined, how do implementations know which control blocks are allowed to use the timer extern? Or the timer can be used anywhere in the P4 program?