pascalkuthe / OpenVAF

An innovative Verilog-A compiler
https://openvaf.semimod.de/
GNU General Public License v3.0
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Unrecognized discipline "voltage" and "current" #102

Open akirt opened 10 months ago

akirt commented 10 months ago

There is a issue when compiling a model contain discipline "voltage" or "current", the sample model is as following:

`include "constants.vams"
`include "disciplines.vams"

module res1(anode, cathode);
inout electrical anode, cathode;
voltage n1;

parameter real res = 1.0;

analog begin
    V(anode,cathode) <+ I(anode,cathode) * res;
    V(n1) <+ V(anode,cathode);
end
endmodule

where the OpenVAF crashed with the attatched log openvaf-crash-1700934785.log . And it just works fine if the n1 is 'electrical', 'thermal' or something else. Only 'voltage' and 'current' would trigger this issue.

gjcoram commented 3 months ago

How do you want this to be handled? The discipline voltage has no flow; it's a "signal flow discipline":

discipline voltage potential Voltage; enddiscipline

In order to simulate this in a Spice-like simulator, do you only want a matrix row to enforce KVL? And nothing for KCL.