Closed Yikai-Xia closed 1 month ago
I have looked at the server code and I do not see why it would freeze the system. I think that the problem is more likely in the FPGA configuration.
The main problem with your approach is that if you remove the CIC filter, some ADC samples will be lost because the throughput of the FPGA to RAM interface in the current version of the adc_test
project is not sufficient to transfer the ADC samples at the full sample rate.
I am closing this issue because I do not think that this is the right place to discuss problems in your code. I think that these kinds of issues should be opened in a fork of this repository containing all your changes.
Description of the setup:
Description of the problem:
Like the way you do in adc_trigger_recorder project, after the FPGA recorded the ADC samples into RAM and the oscilloscope stopped, I was trying to send the data samples to the client. But the SSH and the connection broke after sending about 88MB of data. The data already sent to the client is as expected and without issue. The program completes successfully if the data size is below this threshold.
I have checked the RAM writer position from its sts port output, it is way above the breakpoint. Meanwhile, I have tried different sizes of sending data chunk, CPU sleep time and sending buffer size, but these changes did not resolve the issue.
Steps to reproduce the problem:
Thank you very much for your assistance in resolving this issue.