pavel-demin / red-pitaya-notes

Notes on the Red Pitaya Open Source Instrument
http://pavel-demin.github.io/red-pitaya-notes/
MIT License
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How to build bootable alpine #917

Closed iAnyKey closed 4 years ago

iAnyKey commented 4 years ago

Description of the setup:

Description of the problem:

Hi,

A prebuilt alpine image, which you have provided works and boots. I am trying now to build alpine linux by myself using provided scripts. I would like to compile some simple custom vivado-project (like changing the number of blinking leds in your led_blinker) and flash it to the SD card with Alpine linux on top of it. Following procedure allows me only to boot FSBL (while Zynq accepts the bitstream of the custom project from bootloader), but alpine linux itself will not boot afterwards. Or it boots only with default led_blink project on startup and stuck during startup (see debug output below) Unfortunately I'm stuck lloking for reason, why. Debug output looks as follows:

U-Boot 2019.01 (Dec 18 2019 - 15:24:09 -0500)

CPU:   Zynq 7z010
Silicon: v3.1
Model: Red Pitaya Board
I2C:   ready
DRAM:  ECC disabled 480 MiB
I2C:EEPROM selection failed
MMC:   mmc@e0100000: 0
Loading Environment from EEPROM... OK
In:    serial@e0000000
Out:   serial@e0000000
Err:   serial@e0000000
Net:   ZYNQ GEM: e000b000, phyaddr 1, interface rgmii-id
eth0: ethernet@e000b000
Hit any key to stop autoboot:  0
Importing environment from SD...
Device: mmc@e0100000
Manufacturer ID: 41
OEM: 3432
Name: SD16G
Bus Speed: 50000000
Mode : SD High Speed (50MHz)
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 7.4 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
509 bytes read in 12 ms (41 KiB/s)
Device: mmc@e0100000
Manufacturer ID: 41
OEM: 3432
Name: SD16G
Bus Speed: 50000000
Mode : SD High Speed (50MHz)
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 7.4 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
4176632 bytes read in 250 ms (15.9 MiB/s)
10537 bytes read in 15 ms (685.5 KiB/s)
2534498 bytes read in 162 ms (14.9 MiB/s)
## Booting kernel from Legacy Image at 02080000 ...
   Image Name:   Linux-4.19.84-xilinx
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    4176568 Bytes = 4 MiB
   Load Address: 00008000
   Entry Point:  00008000
   Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 03000000 ...
   Image Name:
   Image Type:   ARM Linux RAMDisk Image (gzip compressed)
   Data Size:    2534434 Bytes = 2.4 MiB
   Load Address: 00000000
   Entry Point:  00000000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 02000000
   Booting using the fdt blob at 0x2000000
   Loading Kernel Image ... OK
   Loading Ramdisk to 1c8e6000, end 1cb50c22 ... OK
   Loading Device Tree to 1c8e0000, end 1c8e5928 ... OK

Starting kernel ...

Booting Linux on physical CPU 0x0
Linux version 4.19.84-xilinx (osboxes@osboxes) (gcc version 8.2.0 (GCC)) #1 SMP                                                                                                                                    PREEMPT Wed Dec 18 14:34:06 EST 2019
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt: Machine model: xlnx,zynq-7000
Memory policy: Data cache writealloc
cma: Reserved 16 MiB at 0x1d000000
random: get_random_bytes called from start_kernel+0x7c/0x3c8 with crng_init=0
percpu: Embedded 15 pages/cpu s31756 r8192 d21492 u61440
Built 1 zonelists, mobility grouping on.  Total pages: 121920
Kernel command line: console=ttyPS0,115200 earlyprintk modloop=modloop
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Memory: 458140K/491520K available (6144K kernel code, 205K rwdata, 1600K rodata,                                                                                                                                    1024K init, 134K bss, 16996K reserved, 16384K cma-reserved, 0K highmem)
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
    vmalloc : 0xde800000 - 0xff800000   ( 528 MB)
    lowmem  : 0xc0000000 - 0xde000000   ( 480 MB)
    pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
    modules : 0xbf000000 - 0xbfe00000   (  14 MB)
      .text : 0x(ptrval) - 0x(ptrval)   (7136 kB)
      .init : 0x(ptrval) - 0x(ptrval)   (1024 kB)
      .data : 0x(ptrval) - 0x(ptrval)   ( 205 kB)
       .bss : 0x(ptrval) - 0x(ptrval)   ( 135 kB)
rcu: Preemptible hierarchical RCU implementation.
rcu:    RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
        Tasks RCU enabled.
rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
slcr mapped to (ptrval)
L2C: platform modifies aux control register: 0x72360000 -> 0x72760000
L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
zynq_clock_init: clkc starts at (ptrval)
Zynq clock init
sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025                                                                                                                                   , max_idle_ns: 440795209040 ns
Switching to timer-based delay loop, resolution 3ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 5375                                                                                                                                   38477 ns
timer #0 at (ptrval), irq=17
Console: colour dummy device 80x30
Calibrating delay loop (skipped), value calculated using timer frequency.. 666.6                                                                                                                                   6 BogoMIPS (lpj=3333333)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
CPU: Testing write buffer coherency: ok
CPU0: Spectre v2: using BPIALL workaround
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x100000 - 0x100060
rcu: Hierarchical SRCU implementation.
smp: Bringing up secondary CPUs ...
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
CPU1: Spectre v2: using BPIALL workaround
smp: Brought up 1 node, 2 CPUs
SMP: Total of 2 processors activated (1333.33 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911                                                                                                                                   2604462750000 ns
futex hash table entries: 512 (order: 3, 32768 bytes)
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor menu
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
e0000000.serial: ttyPS0 at MMIO 0xe0000000 (irq = 26, base_baud = 6249999) is a                                                                                                                                    xuartps
console [ttyPS0] enabled
e0001000.serial: ttyPS1 at MMIO 0xe0001000 (irq = 27, base_baud = 6249999) is a                                                                                                                                    xuartps
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
media: Linux media interface: v0.10
videodev: Linux video capture interface: v2.00
pps_core: LinuxPPS API ver. 1 registered
pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@l                                                                                                                                   inux.it>
PTP clock support registered
EDAC MC: Ver: 3.0.0
Advanced Linux Sound Architecture Driver Initialized.
clocksource: Switched to clocksource arm_global_timer
NET: Registered protocol family 2
tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes)
TCP established hash table entries: 4096 (order: 2, 16384 bytes)
TCP bind hash table entries: 4096 (order: 3, 32768 bytes)
TCP: Hash tables configured (established 4096 bind 4096)
UDP hash table entries: 256 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
Trying to unpack rootfs image as initramfs...
Freeing initrd memory: 2476K
hw perfevents: no interrupt-affinity property for /pmu@f8891000, guessing.
hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
Initialise system trusted keyrings
workingset: timestamp_bits=30 max_order=17 bucket_order=0
squashfs: version 4.0 (2009/01/31) Phillip Lougher
jffs2: version 2.2. (NAND) (SUMMARY)  © 2001-2006 Red Hat, Inc.
Key type asymmetric registered
Asymmetric key parser 'x509' registered
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
io scheduler mq-deadline registered
io scheduler kyber registered
xdevcfg f8007000.devcfg: ioremap 0xf8007000 to (ptrval)
brd: module loaded
loop: module loaded
libphy: Fixed MDIO Bus: probed
CAN device driver interface
libphy: MACB_mii_bus: probed
Intel XWAY PHY11G (PEF 7071/PEF 7072) v1.5 / v1.6 e000b000.ethernet-ffffffff:01:                                                                                                                                    attached PHY driver [Intel XWAY PHY11G (PEF 7071/PEF 7072) v1.5 / v1.6] (mii_bu                                                                                                                                   s:phy_addr=e000b000.ethernet-ffffffff:01, irq=POLL)
macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 30 (00                                                                                                                                   :26:32:f0:75:bc)
e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci-pci: EHCI PCI platform driver
usbcore: registered new interface driver usb-storage
chipidea-usb2 e0002000.usb: e0002000.usb supply vbus not found, using dummy regu                                                                                                                                   lator
chipidea-usb2 e0002000.usb: Linked as a consumer to regulator.0
ULPI transceiver vendor/product ID 0x0424/0x0007
Found SMSC USB3320 ULPI transceiver.
ULPI integrity check: passed.
ci_hdrc ci_hdrc.0: EHCI Host Controller
ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1
ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
i2c /dev entries driver
at24 0-0050: 8192 byte 24c64 EEPROM, writable, 32 bytes/write
cdns-i2c e0004000.i2c: 400 kHz mmio e0004000 irq 23
cdns-wdt f8005000.watchdog: Xilinx Watchdog Timer at (ptrval) with timeout 10s
EDAC MC: ECC not enabled
Xilinx Zynq CpuIdle Driver started
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
sdhci-pltfm: SDHCI platform and OF driver helper
mmc0: SDHCI controller on e0100000.mmc [e0100000.mmc] using ADMA
ledtrig-cpu: registered to indicate activity on CPUs
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
NET: Registered protocol family 10
Segment Routing with IPv6
sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
NET: Registered protocol family 17
can: controller area network core (rev 20170425 abi 9)
NET: Registered protocol family 29
can: raw protocol (rev 20170425)
can: broadcast manager protocol (rev 20170425 t)
can: netlink gateway (rev 20170425) max_hops=1
Registering SWP/SWPB emulation handler
Loading compiled-in X.509 certificates
hctosys: unable to open rtc device (rtc0)
ALSA device list:
  No soundcards found.
Freeing unused kernel memory: 1024K
Run /init as init process
mmc0: Problem switching card into high-speed mode!
mmc0: new SDHC card at address 0001
mmcblk0: mmc0:0001 SD16G 7.45 GiB
 mmcblk0: p1
Alpine Init 3.4.0-r2
 * Loading boot drivers: ok.
 * Mounting boot media: random: fast init done
failed.
initramfs emergency recovery shell launched. Type 'exit' to continue boot
sh: can't access tty; job control turned off
/ #

So I would like to know how I can build bootable alpine with my project using your scripts.

regards, Dimitrii

Steps to reproduce the problem:

  1. run make NAME=led_blinker all
  2. run make NAME=adc_test all
  3. run source .\scripts\alpine.sh
  4. format SD card as single partition with FAT32
  5. extract generated red-pitaya-alpine-3.9-armv7-YYYYMMDD.zip to SD Card
  6. copy generated boot.bin, devicetree.dtb, uImage and provided uEnv.txt to SD Card
  7. insert SD Card into Red-Pitaya
  8. plug in and connect to debug serial port via PuTTY
  9. power up Red-Pitaya
pavel-demin commented 4 years ago

Here is the correct command to run the alpine*.sh scripts:

sudo sh scripts/alpine.sh

I'd say that the step 5 isn't needed. The .zip file contains all the required files and directories.

For an example of a script building an image with a single application have a look at build-scanner.sh and alpine-scanner.sh. The following command works for me:

source helpers/build-scanner.sh
iAnyKey commented 4 years ago

Thanks, sh with root lets alpine be built properly! I took a look into helper scripts, and as far I understand, you are doing with your scripts following:

  1. Builds the project led_blinker completely to use it as bootloader
  2. Builds the project (or several projects) you actually want to run just as bitstream
  3. Builds alpine including your projects stored in /media/mmcblk0p1/apps/...

So if I'm right you are always booting up with led_blinker as initial bitstream and using its devicetree for any other bitstreams, which you can "start" from linux using cat path/to/project/bitstream.bit > /dev/xdevcfg I would like to generate a bootable linux with some different Project.

It seems like I almost figured it out:

  1. I ran make NAME=led_blinker xpr
  2. Opened _ledblinker.xpr in Vivado and performed a couple changes (set slicer and led o to 2 bits output instead of 1 and activated FCLK_1 on 4MHz) resulting Blockdesign of custom_led_test2
  3. Saved the project to ./tmp as _custom_ledtest2
  4. Built a .bit file and exported it as./tmp/custom_led_test2.bit
  5. Exported Hardware as ./tmp/custom_led_test2.xsa
  6. ran make NAME=led_blinker_test all to generate a bootloader right here I`m facing a trouble with generation of the device tree:
    patch -d tmp/custom_led_test2.tree < patches/devicetree.patch
    patching file pcw.dtsi
    Hunk #3 FAILED at 72.
    1 out of 3 hunks FAILED -- saving rejects to file pcw.dtsi.rej
    patching file system-top.dts
    make: *** [Makefile:162: tmp/custom_led_test2.tree/system-top.dts] Error 1

    For the first test project _custom_ledtest, where i just changed a number of led_o bits I was able to perform next steps as follow:

  7. ran sudo sh scripts/alpine.sh
  8. extract allfiles from red-pitaya-alpine-3.9-armv7-YYYYMMDD.zip
  9. bootup Redpitaya, check debug output
  10. connect over ssh using the hostname

There are 2 sections of Makefile I not really understand yet:

  1. Patching of the generated devicetree:
    161      sed -i 's|#include|/include/|' $@
    162      patch -d $(@D) < patches/devicetree.patch

    What purpose do this patching have? Is the generated device tree not enough to get a correct bootloader inkluding all stuff like xadc and memory mapping?

  2. Specification of memory offset for uBoot:
    131     echo "img:{[bootloader] tmp/$(NAME).fsbl/executable.elf tmp/$(NAME).bit 
                   [load=0x4000000,startup=0x4000000] $(UBOOT_DIR)/u-boot.bin}" > tmp/boot.bif
    132     bootgen -image tmp/boot.bif -w -o i $@

    Why do you need to offset uBoot to 0x4000000?

pavel-demin commented 4 years ago

I'm not sure how to answer the questions in point 1. Of course, if there is a patch, it is necessary. The device tree is used to configure various subsystems and Linux modules. Some parts of the device tree generated by the device tree generator do not work for me without patching. If you have a better solution, please share.

The question from point 2 should be addressed to the Xilinx and/or U-Boot developers.

CONFIG_SYS_TEXT_BASE is set to 0x4000000 in almost all the ZYNQ configuration files: https://github.com/Xilinx/u-boot-xlnx/blob/xilinx-v2019.2/configs/zynq_zc702_defconfig#L3 https://github.com/Xilinx/u-boot-xlnx/blob/xilinx-v2019.2/configs/zynq_zed_defconfig#L3

I've just copied this value.

If I'm not mistaken, bootgen can read the address from u-boot.elf. So, when using u-boot.elf, no address has to be specified in the BIF file. However, when using u-boot.bin, the load and startup addresses must be specified. For more information about bootgen, u-boot.elf and u-boot.bin, please see the bootgen and U-Boot documentation.