Features

[UweBonnes]

• Handle Stlink V3
• Handle multiple connected Stlinks
• Try harder to handle devices much of the time in sleep
• Handle Stm32H7 programming
• Handle Stm32L4/G0 programming
• Handle Stm32L0/L1 programming

[UweBonnes]

Pavel Revak writes:

L0 or G0 ?

This is really STM32G0.

• 'erase_sizes': (2*1024, ),

spaces around *

Done. Many mor entries miss that space!

do not use backslash . put right side into brackets instead. Done.

Cheers. -- Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 1623569 ------- Fax. 06151 1623305 ---------

[pavelrevak]

if I trying to flash 2MB .bin file at once:

./pystlink flash:erase:verify:test.bin 
DEVICE: ST-Link/V2-1 V2J29M18
SUPPLY: 3.24V
CORE:   CortexM7
MCU:    STM32H743xI/STM32H753xI
FLASH:  2048KB
SRAM:   1024KB
Loaded 2097152 Bytes from test.bin file
*** Parameter error: name 'clear_sr' is not defined ***

[UweBonnes]

I removed all "\n" from exceptions . Now I use brackets instead of line continuation. clear_sr() is now self.clear_sr()

On first programming H7, I see the error status register error 0x2010001 meaning Bit 25 SNECCERR1: Bank 1 single correction error flag I do not see it with next flashing. Maybe some artefact from factory testing?

[pavelrevak]

Ok, I taking your PR, it has very important features, I will fix them later, thanks a lot, great job!

[UweBonnes]

What still needs fixing?