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migen-axi
AXI support for Migen/MiSoC
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Tests for AXI2CSR
#2
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peteut
closed
6 years ago
peteut
commented
6 years ago
[x] signal list B1.1.1
[x] bus width B1.1.2
[x] write strobes B1.1.3, memory access slaves must fully support write strobes
[x] optional signaling B1.1.4, shall support AXI IDs
[x] bridge requirements of AXI4-Lite slaves B1.2.1, requires AXI ID reflection
[x] direct connection requirements of AXI4-Lite slaves, B1.2.2, see B1.2.1
See ARM IHI 0022D.
See ARM IHI 0022D.