Closed Spaqin closed 2 years ago
This PR aims to add support for SRAM connected directly to AXI bus, rather than CSR (through axi2csr) or Wishbone.
The tests for the code were modified from AXI2CSR tests, and they seem to work very well for this purpose.
@Spaqin thanks for your contribution!
This PR aims to add support for SRAM connected directly to AXI bus, rather than CSR (through axi2csr) or Wishbone.
The tests for the code were modified from AXI2CSR tests, and they seem to work very well for this purpose.