Reducing compile time

[rkshthrmsh]

I am working on a magma circuit (~350 lines of code), which takes ~40 minutes to compile to mlir (not mlir-verilog, which I assume will take longer). Of course, the long compile time could also be becuase the circuit is complex, but I am wondering if there are any guidelines for reducing compile time?

Came across this RFC #806 for the coreir compiler and I believe that even with MLIR the .mlir and .(s)v generation happens from scratch each time the compiler is called, which might be one of the reasons for long compile times.

[leonardt]

It's difficult to provide guidance here without more information on how/why the circuit is complex. For example, I could write a tiny circt (a few lines of code) that takes forever to compile (insert a giant for loop).

Without seeing the code, we might investigate where the time is being spent:

• is it creating a large amount of objects? Often slow compilation can come from a large number of instances, ports, and wiring. There may be ways to avoid creating this many objects, such as adding more levels of hierarchy to avoid elaboration of objects.
• does the code take a long time to run in Python (i.e. without even calling compile)? This would let us know whether the issue is arising in the user code or arising in the magma compilation internals.

One useful tool would be to profile the runtime (https://docs.python.org/3/library/profile.html) to see where time is being spent. For example, we may see a bulk of the time being spent in wiring, which might suggest investigating ways to improve the wiring logic.