Closed ziemleszcz closed 7 months ago
6 410 tests ±0 5 780 :white_check_mark: ±0 33m 21s :stopwatch: +2s 354 suites ±0 630 :zzz: ±0 1 files ±0 0 :x: ±0
Results for commit 22171470. ± Comparison against base commit 7f980d4d.
:recycle: This comment has been updated with latest results.
Reinitialize FIFOs and reset MU module prior to CM4 core reset to flush old RX & TX data on CM7 & CM4 cores.
JIRA: NIL-441
Description
Motivation and Context
Types of changes
How Has This Been Tested?
Checklist:
Special treatment