Open adamdebek opened 5 months ago
To be checked using oscilloscope or firstly by logic analyzer - to see how this signal looks like - maybe rpi started to set this pin more slowly (?)
It seems that the nrst_pin has to be down for ~6.2ms so much less. From imx6ull reference manual:
As soon as SRC_POR_B occurs, all resets are asserted and the entire chip is reset by
SRC. The SRC_POR_B is stretched for 2 XTALI cycles and the stretching sequence
takes place after 2 XTALI clocks of POR_B pin deassertion.
XTAL is 32kHz
Please underline that it's only needed on imx6ull target - prefix would be a good idea
Also please always put the phrtos-project revision in issues - I see that you placed a link from CI, but it's active only for some time.
On imx6ull occasionally appeared problem with lack of soft restart caused due to too short time of holding
nRST
pin down during test campaigns.Example run: https://github.com/phoenix-rtos/phoenix-rtos-project/actions/runs/8445210403/job/23132189522
For now previous time (0.1s) is changed to 0.2s, which seemed sufficient but it should be checked more in-depth.