search

physical-computation / Sail-RV32I-common

Common files for the Sail RISC-V processor.
MIT License
5 stars 13 forks source link

Implement a modified Harvard architecture, with separate instruction and data caches but single memory. #15

Open rjlv2 opened 5 years ago

rjlv2 commented 5 years ago

Simulation was working in e9f6f8f67f634d0a8cd7c44c5df4235dfdb6db3c. But could not get it run on the FPGA.