Open rjlv2 opened 5 years ago
Specifically ALUSrc control signal. Somehow it accepts (~6).(~4) + (~6).(~5).(4) but not (~6).(~4) + (~6).~(5), though they are the same in boolean logic.
(~6).(~4) + (~6).(~5).(4)
(~6).(~4) + (~6).~(5)
This issue seems to be only limited to the branch of Sail used in uncertainty propagation. Works ok on the normal RV32I processor.
Specifically ALUSrc control signal. Somehow it accepts
(~6).(~4) + (~6).(~5).(4)
but not(~6).(~4) + (~6).~(5)
, though they are the same in boolean logic.