Open piranna opened 7 years ago
Since all inmediate values fit under 5 or 10 bytes (except for br_table
that are variable), and also they can have a variable length and it's easy to detect when it's needed more data, it could be used a standard bus width to comunicate with external off-the-shelf memories instead of use a custom one with non-power-of-two widths, reducing usage of FPGA resources and costs. varuint32
values need 5 bytes and varuint64
values require 10, so with a bus of 32 bits it could be possible to get varuint32
inmediates up to 21 bits with the operator, and with 64 bits it could be possible to get all varuint32
inmediates and the varuint64
inmediates up to 49 bits.
Fetch the optional inmediate operator at the same time we search for the opcode to earn some CPU cycles, and ignore them in case they are not needed.