This uses strong (read and write) memory barriers to prevent instruction reordering when trying to stop the CPU thread while a watchpoint has trapped it.
The barrier strength can probably be reduced, but I'm a bit paranoid because the way this whole code base uses threads really has me on edge.
This uses strong (read and write) memory barriers to prevent instruction reordering when trying to stop the CPU thread while a watchpoint has trapped it.
The barrier strength can probably be reduced, but I'm a bit paranoid because the way this whole code base uses threads really has me on edge.