Open Thilanka97 opened 6 years ago
Thank you for the interest. I got a try with OpenCL on Intel FPGA. You can have a look at the open demonstration video on YouTube.
@BrianLiu3650 How much percent do you rate the speed of OpenCL compared to VHDL/Verilog on Intel A10 FPGA?
It seems that, for example, OpenCL (SDAccel) is ~100x slower compared to VHDL/Verilog on Xilinx FPGA.
@AlexeyAB First of all, the comparison between OpenCL and RTL should be case by case. From my experience, the former methodology mainly aims to fast time development and also can achieve high performance with elaborated architecture, while the traditional RTL flow need more efforts and experts. Before answer your question, I'm afraid so far there's none RTL implementation which accelerates the original YOLOv2/v3 but the quantified/customized version. You can refer to the work of Lightweight YOLOv2 released at the beginning of this year.
@BrianLiu3650 Thank you! Is this the fpga openCL implementation of original yolov2 ? It looks good ! Are you okay with sharing your code ?
@BrianLiu3650 I am planning to implement yolov2 on fpga using opencl. I saw that you used arria 10 board. I also thought of using Arria 10 board but my budget is limited. I dont have a good understanding of how powerful the fpga should be for it to run yolov2 without any trouble. It would be a great help if u could tell me what specifications I should seek for when choosing a board at about 1500 or less than 2000 usd.
Thanks in advance !
@BrianLiu3650 do you have an idea about the difference between, coding targeting fpga using opencl and coding targeting GPU and CPU using opencl ? How different are they ? what are the main differences. If you could help me with this, it would be a great help. please be kind enough to help me.
Thnaks in advance!
Can you check project I am taking care on FPGA. I have no access. to such device with OpenCL support. My project had some issues but now seams to the most of them have been solved at https://github.com/sowson/darknet it is Darknet in OpenCL... that works! :D. I am looking for contributor who help with pull request that add Windows setup possibility.
I'm trying to implement YOLOv3 Tiny on an Arria 10 SoC board. I have referred to many documents and looked through the GitHub repositories, but it's really challenging for me. I intend to use ARM Cortex-A9 as the host. I'm still looking for assistance. I hope to receive support from you
has anyone implemented yolov3 or yolov2 on FPGA using openCL ? If so could you please give me the details or the code if possible? It would be a great help ! Thanks in advance !