Closed GoogleCodeExporter closed 9 years ago
Finally found the LLL documentation in the B5281 Processor Training Manual (it
was hidden with SSF under the Index syllable in section 3.32 and not mentioned
in the TOC).
LLL uses the full 39-bit mantissa adder to compare words from memory in the B
register with the test word in the A register. It complements [9:39] in the A
register and then checks for adder overflow as each word in the list is brought
into B. Overflow indicates B.[9:39] >= A.[9:39] (considering the value of A
before it's complemented), which stops the search.
The discussion of bits 30=>16 in the hardware manuals appears to be oriented to
how LLL was intended to be used, not how it actually worked.
This issue is resolved. The emulator is doing the comparison correctly (if not
the way the hardware actually did it).
Original comment by paul.kimpel@digm.com
on 3 Mar 2013 at 4:23
Confirmed.
Original comment by paul.kimpel@digm.com
on 29 Dec 2013 at 4:40
Original issue reported on code.google.com by
paul.kimpel@digm.com
on 3 Mar 2013 at 3:18