Auto compressing Zce instructions

[abukharmeh]

Hi,

I am testing Zce assembler, and it feels like the assembler does not check if it can use compressed Zce instructions.

For instance, trying the following assembly code:

not x15,x15
add x15,x0,x15

I would expect the assembler to generate two compressed instruction (c.not and c.mv), however, it generate a compressed instruction for the add and 32 bit instruction (xori -1) for c.not

Using Zce compressed instructions explicitly work, but auto compression should also work.

Kind regards, Ibrahim.

[Xinlong-Wu]

Hi, Ibrahim

Yes, in fact, we are not optimising/compressing instructions at the assembly level. We are generating Zce assembly instructions by changing the llvm IR instructions. that's why the llvm-mc will not compress the code. it's only work is to generate the obj file. You can try writing c source programs or LLVM IR programs to check the compression efficiency. this link may helps you. https://www.wulongxin.com/index.php/archives/950/

Note: Inline assemblies are also not compressed

Yours sincerely , Wu Xinlong

[ScottEgerton]

Hi,

Please correct me if I’m wrong but I believe that support for this kind of optimisation could be added in a similar fashion to what has been done here https://github.com/plctlab/llvm-project/blob/647625214a658572ac0beea6800b4abb07d46530/llvm/lib/Target/RISCV/RISCVInstrInfoZce.td#L710

Kind regards, Scott

[Xinlong-Wu]

ok, we will take a try

[luke957]

Hi,

Please correct me if I’m wrong but I believe that support for this kind of optimisation could be added in a similar fashion to what has been done here

https://github.com/plctlab/llvm-project/blob/647625214a658572ac0beea6800b4abb07d46530/llvm/lib/Target/RISCV/RISCVInstrInfoZce.td#L710

Kind regards, Scott

Thanks for the infomation.

[luke957]

Hi,

I am testing Zce assembler, and it feels like the assembler does not check if it can use compressed Zce instructions.

For instance, trying the following assembly code:

not x15,x15
add x15,x0,x15

I would expect the assembler to generate two compressed instruction (c.not and c.mv), however, it generate a compressed instruction for the add and 32 bit instruction (xori -1) for c.not

Using Zce compressed instructions explicitly work, but auto compression should also work.

Kind regards, Ibrahim.

For now we have implemented auto compression for zcee and NOT NEG, so you can try your assembly code again. We will try to fix other instructions during the following days. Thanks.

[abukharmeh]

Excellent, thank you for that.

[abukharmeh]

We appear to have a regression where we don't auto compress lb to cm.lb and like wise, while I expect them to be auto compressed ?
Edit: It appears to actually work, sorry !