v1.1.0 features and corrections

[pluggee]

• eliminate sleep pin control, instead use it as an analog input from current monitor

[pluggee]

• use ZXCT1107 or ZXCT1109 for driver power monitor

[pluggee]

• use driver fault output to measure VDD against internal reference and compensate PWM output, use the following schematic
• use 568-11588-2-ND (2N7002P,235) FET to turn on R2 using C2D pin

operating sequence should be

• C2D = LOW at boot up
• read !FAULT pin from DRV8825
• if !FAULT = HIGH then proceed with VDD measurement
  • set C2D HIGH
  • set !FAULT as ADC input
  • measure VDD value
  • set !FAULT as CMOS input
  • set C2D LOW

[pluggee]

• add debug port to driver, isolate RESET port through a high series resistance

[pluggee]

-fix major issue with tapping master signal, it should be the signals going to the driver not the ones coming from the socket (in this case if the driver is a slave then it will export its socket signals to the next slave, not the original master)