cannot create region by cxl-cli

[zhuohaofan]

I created a CXL guest refer to Compute Express Link (CXL).
The guest kerel is 6.0.2.

[root@cxldemo ~]# cat /etc/redhat-release
Fedora release 35 (Thirty Five)
[root@cxldemo ~]# uname -a
Linux cxldemo 6.0.2-325.vanilla.1.fc35.x86_64 #1 SMP PREEMPT_DYNAMIC Sat Oct 15 06:49:24 UTC 2022 x86_64 x86_64 x86_64 GNU/Linux

cxl-cli verison is 74.

[root@cxldemo ~]# cxl --version
74

In the guest, 'cxl' can list the cxl devices. But fail to create region. The debug error messge as follow:

[root@cxldemo ~]# cxl create-region -d decoder0.0 -m mem0 mem2 --debug
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices' dev: 'root'
libcxl: add_cxl_bus: root0: base: '/sys/bus/cxl/devices/root0'
libcxl: __util_modalias_to_module: failed to find module for alias: cxl:t4 0 list: empty
libcxl: __sysfs_device_parse: root0: processed
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/root0' dev: 'decoder0.'
libcxl: add_cxl_decoder: decoder0.0: base: '/sys/bus/cxl/devices/root0/decoder0.0'
libcxl: __sysfs_read_attr: failed to open /sys/bus/cxl/devices/root0/decoder0.0/mode: No such file or directory
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/root0/decoder0.0' dev: 'region'
libcxl: add_cxl_decoder: decoder0.0: target0 /sys/devices/LNXSYSTM:00/LNXSYBUS:00/ACPI0016:01 phys_path: /sys/devices/pci0000:0c
libcxl: add_cxl_decoder: decoder0.0: target1 /sys/devices/LNXSYSTM:00/LNXSYBUS:00/ACPI0016:00 phys_path: /sys/devices/pci0000:de
libcxl: __sysfs_device_parse: decoder0.0: processed
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices' dev: 'mem'
libcxl: add_cxl_memdev: mem3: base: '/sys/bus/cxl/devices/mem3'
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/mem3' dev: 'pmem'
libcxl: add_cxl_pmem: pmem3: pmem_base: '/sys/bus/cxl/devices/mem3/pmem3'
libcxl: __sysfs_device_parse: pmem3: processed
libcxl: __sysfs_device_parse: mem3: processed
libcxl: add_cxl_memdev: mem1: base: '/sys/bus/cxl/devices/mem1'
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/mem1' dev: 'pmem'
libcxl: add_cxl_pmem: pmem1: pmem_base: '/sys/bus/cxl/devices/mem1/pmem1'
libcxl: __sysfs_device_parse: pmem1: processed
libcxl: __sysfs_device_parse: mem1: processed
libcxl: add_cxl_memdev: mem2: base: '/sys/bus/cxl/devices/mem2'
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/mem2' dev: 'pmem'
libcxl: add_cxl_pmem: pmem2: pmem_base: '/sys/bus/cxl/devices/mem2/pmem2'
libcxl: __sysfs_device_parse: pmem2: processed
libcxl: __sysfs_device_parse: mem2: processed
libcxl: add_cxl_memdev: mem0: base: '/sys/bus/cxl/devices/mem0'
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/mem0' dev: 'pmem'
libcxl: add_cxl_pmem: pmem0: pmem_base: '/sys/bus/cxl/devices/mem0/pmem0'
libcxl: __sysfs_device_parse: pmem0: processed
libcxl: __sysfs_device_parse: mem0: processed
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/root0/decoder0.0' dev: 'region'
libcxl: add_cxl_region: region0: base: '/sys/bus/cxl/devices/root0/decoder0.0/region0'
libcxl: __util_modalias_to_module: alias: cxl:t6 module: cxl_core
libcxl: __sysfs_device_parse: region0: processed
libcxl: write_attr: failed to write 0x20000000
 to /sys/bus/cxl/devices/root0/decoder0.0/region0/size: Numerical result out of range
cxl region: create_region: region0: set_size failed: Numerical result out of range
cxl region: cmd_create_region: created 0 regions

[root@cxldemo ~]# cxl list -vvv
[
  {
    "bus":"root0",
    "provider":"ACPI.CXL",
    "nr_dports":2,
    "dports":[
      {
        "dport":"ACPI0016:00",
        "alias":"pci0000:de",
        "id":222
      },
      {
        "dport":"ACPI0016:01",
        "alias":"pci0000:0c",
        "id":12
      }
    ],
    "ports:root0":[
      {
        "port":"port1",
        "host":"ACPI0016:00",
        "depth":1,
        "nr_dports":2,
        "dports":[
          {
            "dport":"0000:de:00.0",
            "id":0
          },
          {
            "dport":"0000:de:01.0",
            "id":1
          }
        ],
        "decoders:port1":[
          {
            "decoder":"decoder4.0",
            "interleave_ways":1,
            "state":"disabled"
          },
          {
            "decoder":"decoder3.0",
            "interleave_ways":1,
            "state":"disabled"
          },
          {
            "decoder":"decoder1.0",
            "interleave_ways":1,
            "state":"disabled",
            "nr_targets":1,
            "targets":[
              {
                "target":"0000:de:00.0",
                "position":0,
                "id":0
              }
            ]
          }
        ],
        "memdevs:port1":[
          {
            "memdev":"mem1",
            "pmem_size":268435456,
            "ram_size":0,
            "serial":0,
            "host":"0000:e0:00.0",
            "partition_info":{
              "total_size":268435456,
              "volatile_only_size":0,
              "persistent_only_size":268435456,
              "partition_alignment_size":0
            }
          },
          {
            "memdev":"mem0",
            "pmem_size":268435456,
            "ram_size":0,
            "serial":0,
            "host":"0000:df:00.0",
            "partition_info":{
              "total_size":268435456,
              "volatile_only_size":0,
              "persistent_only_size":268435456,
              "partition_alignment_size":0
            }
          }
        ]
      },
      {
        "port":"port2",
        "host":"ACPI0016:01",
        "depth":1,
        "nr_dports":2,
        "dports":[
          {
            "dport":"0000:0c:00.0",
            "id":0
          },
          {
            "dport":"0000:0c:01.0",
            "id":1
          }
        ],
        "decoders:port2":[
          {
            "decoder":"decoder5.0",
            "interleave_ways":1,
            "state":"disabled"
          },
          {
            "decoder":"decoder6.0",
            "interleave_ways":1,
            "state":"disabled"
          },
          {
            "decoder":"decoder2.0",
            "interleave_ways":1,
            "state":"disabled",
            "nr_targets":1,
            "targets":[
              {
                "target":"0000:0c:00.0",
                "position":0,
                "id":0
              }
            ]
          }
        ],
        "memdevs:port2":[
          {
            "memdev":"mem2",
            "pmem_size":268435456,
            "ram_size":0,
            "serial":0,
            "host":"0000:0d:00.0",
            "partition_info":{
              "total_size":268435456,
              "volatile_only_size":0,
              "persistent_only_size":268435456,
              "partition_alignment_size":0
            }
          },
          {
            "memdev":"mem3",
            "pmem_size":268435456,
            "ram_size":0,
            "serial":0,
            "host":"0000:0e:00.0",
            "partition_info":{
              "total_size":268435456,
              "volatile_only_size":0,
              "persistent_only_size":268435456,
              "partition_alignment_size":0
            }
          }
        ]
      }
    ],
    "decoders:root0":[
      {
        "decoder":"decoder0.0",
        "resource":19595788288,
        "size":4294967296,
        "interleave_ways":2,
        "interleave_granularity":8192,
        "max_available_extent":4294967296,
        "pmem_capable":true,
        "volatile_capable":true,
        "accelmem_capable":true,
        "nr_targets":2,
        "targets":[
          {
            "target":"ACPI0016:00",
            "alias":"pci0000:de",
            "position":1,
            "id":222
          },
          {
            "target":"ACPI0016:01",
            "alias":"pci0000:0c",
            "position":0,
            "id":12
          }
        ]
      }
    ]
  }
]

[vliaskov]

I have not reproduced the problem yet due to other issues in my setup.

Perhaps this is a qemu problem (not a cxl/ndctl tool problem). The patch below fixes a relevant qemu issue that causes cxl create region to always fail:

https://lists.gnu.org/archive/html/qemu-devel/2022-10/msg06241.html

[cocalele]

I also have problem on enable cxl pmem. but the error message is:

#  cxl create-region -d decoder0.0  -m mem0 --debug
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices' dev: 'mem'
libcxl: add_cxl_memdev: mem0: base: '/sys/bus/cxl/devices/mem0'
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/mem0' dev: 'pmem'
libcxl: add_cxl_pmem: pmem0: pmem_base: '/sys/bus/cxl/devices/mem0/pmem0'
libcxl: __sysfs_device_parse: pmem0: processed
libcxl: __sysfs_device_parse: mem0: processed
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices' dev: 'root'
libcxl: add_cxl_bus: root0: base: '/sys/bus/cxl/devices/root0'
libcxl: __util_modalias_to_module: failed to find module for alias: cxl:t4 0 list: empty
libcxl: __sysfs_device_parse: root0: processed
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/root0' dev: 'port'
libcxl: add_cxl_port: port1: base: '/sys/bus/cxl/devices/root0/port1'
libcxl: __util_modalias_to_module: failed to find module for alias: cxl:t3 0 list: empty
libcxl: __sysfs_device_parse: port1: processed
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/root0/port1' dev: 'endpoint'
libcxl: add_cxl_endpoint: endpoint2: base: '/sys/bus/cxl/devices/root0/port1/endpoint2'
libcxl: __util_modalias_to_module: failed to find module for alias: cxl:t3 0 list: empty
libcxl: __sysfs_device_parse: endpoint2: processed
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/root0' dev: 'decoder0.'
libcxl: add_cxl_decoder: decoder0.0: base: '/sys/bus/cxl/devices/root0/decoder0.0'
libcxl: __sysfs_read_attr: failed to open /sys/bus/cxl/devices/root0/decoder0.0/mode: No such file or directory
libcxl: __sysfs_read_attr: failed to open /sys/bus/cxl/devices/root0/decoder0.0/interleave_granularity: No such file or directory
libcxl: __sysfs_read_attr: failed to open /sys/bus/cxl/devices/root0/decoder0.0/interleave_ways: No such file or directory
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/root0/decoder0.0' dev: 'region'
libcxl: add_cxl_decoder: decoder0.0: target0 /sys/devices/LNXSYSTM:00/LNXSYBUS:00/ACPI0016:00 phys_path: /sys/devices/pci0000:0c
libcxl: add_cxl_decoder: decoder0.0: target0 /sys/devices/LNXSYSTM:00/LNXSYBUS:00/ACPI0016:00 fw_path: none
libcxl: __sysfs_device_parse: decoder0.0: processed
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/root0' dev: 'endpoint'
libcxl: cxl_target_maps_memdev: memdev: /sys/devices/pci0000:0c/0000:0c:00.0/0000:0d:00.0 target: /sys/devices/LNXSYSTM:00/LNXSYBUS:00/ACPI0016:00
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/root0/port1' dev: 'decoder1.'
libcxl: add_cxl_decoder: decoder1.0: base: '/sys/bus/cxl/devices/root0/port1/decoder1.0'
libcxl: __sysfs_read_attr: failed to open /sys/bus/cxl/devices/root0/port1/decoder1.0/mode: No such file or directory
libcxl: __sysfs_read_attr: failed to open /sys/bus/cxl/devices/root0/port1/decoder1.0/interleave_granularity: No such file or directory
libcxl: __sysfs_read_attr: failed to open /sys/bus/cxl/devices/root0/port1/decoder1.0/interleave_ways: No such file or directory
libcxl: add_cxl_decoder: decoder1.0: target0 /sys/devices/pci0000:0c/0000:0c:00.0 phys_path: none
libcxl: add_cxl_decoder: decoder1.0: target0 /sys/devices/pci0000:0c/0000:0c:00.0 fw_path: none
libcxl: __sysfs_device_parse: decoder1.0: processed
libcxl: __sysfs_device_parse: base: '/sys/bus/cxl/devices/root0/port1' dev: 'port'
libcxl: __sysfs_read_attr: failed to open /sys/bus/cxl/devices/root0/decoder0.0/create_pmem_region: No such file or directory
libcxl: cxl_decoder_create_pmem_region: failed to read new region name: No such file or directory
cxl region: create_region: failed to create region under decoder0.0
cxl region: cmd_create_region: created 0 regions