agostini01
commented
12 months ago Hi, We do not have this functionality merged in main yet. We are enabling the flow you described in the branch "accel". We originally had it as a separate project and now I am integrating the extension in soda-opt. It is taking a bit longer than I anticipated, but I hope to finish it within this month.
Here is the runtime library function prototypes. These are specific to accelerators with AXI-Stream interfaces. In particular, we test them with Xilinx SoCs. https://github.com/pnnl/soda-opt/blob/accel/include/soda/ExecutionEngine/axi/api_v2.h
Here is an example of what the intermediate representation right before LLVM looks like: https://github.com/pnnl/soda-opt/blob/accel/test/axi4mlir-runner/run-axi-v1-data-copy.mlir
The MLIR file above is translated in LLVM IR, compiled, and linked with our AXI library using a cross compiler compatible with the target architecture.
I will link this issue and point here to the correct documentation once it is ready.
chaojibendan
I want to implement an algorithm on FPGA. In this process, host(like a Linux server) needs to control accelerator(FPGA), including execution and I/O. I find soda-opt expresses it in a simple way:
MLIR Host Code->Convert SODA Operations to Runtime->Low-Level IR->Translate to LLVM IR->LLVM ToolsTutorial just implements an example on OpenRoad, and doesn't mention it. I never try to control an accelerator by LLVM(except GPU, LLVM uses cuda runtime to control GPU). It seems that FPGA/ASIC does‘t have a runtime lib. Would you like to provide some examples about it? Thank you!