rockoguido
commented
11 months ago hi maybe you have seen this but if not the following app note is very applicable
https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/how-to/booting-from-qspi.md
It seems that you have modified HSS to boot from QSPI based Winbond NAND flash. I boot the Icicle Kit this way frequently with the addition of the Flash 5 click board and Pi 3 Click shield referenced in this app note. So, I can verify this works.
booting Yocto Linux 2023.06 Regards, Dave
Hi, I got a issue booting with QSPI. I have ICICLE-KIT & VIDEO-KIT and both doesn't work.
Enabled CONFIG_SERVICE_QSPI & CONFIG_SERVICE_QSPI_MICRON_MQ25T. But i got only this log
[6.157924] PolarFire(R) SoC Hart Software Services (HSS) - version 0.99.37-unknown MPFS HAL version 2.2.104 / DDR Driver version 0.4.023 / Mi-V IHC version 0.1.1 / BOARD=mpfs-icicle-kit-es (c) Copyright 2017-2022 Microchip FPGA Embedded Systems Solutions.
incorporating OpenSBI - version 1.2 (c) Copyright 2019-2022 Western Digital Corporation.
[6.193251] Build ID: c505aa96a2f0b2c340878848b5c900273c58f6d3 [6.200794] Built with the following tools:
[6.224855] NOTICE: Running from L2 Scratchpad
[6.231061] Serial Number: 6a1f88bf35e83fbfa3e9cf671615e74900000000000000000000000000000000000000000000000000000000000000000000 [6.245001] Segment Configuration: Cached: SEG0_0: offset 0x0080000000, physical DDR 0x00000000 Cached: SEG0_1: offset 0x1000000000, physical DDR 0x00000000 Non-cached: SEG1_2: offset 0x00c0000000, physical DDR 0x00000000 Non-cached: SEG1_3: offset 0x1400000000, physical DDR 0x00000000 Non-cached WCB: SEG1_4: offset 0x00d0000000, physical DDR 0x00000000 Non-cached WCB: SEG1_5: offset 0x1800000000, physical DDR 0x00000000 [6.289972] L2 Cache Configuration: L2-Scratchpad: 4 ways (512 KiB) L2-Cache: 8 ways (1024 KiB) L2-LIM: 4 ways (512 KiB) [6.305918] DDR-Lo size is 32 MiB [6.310596] DDR-Hi size is 1888 MiB [6.334327] Please ensure that jumpers J34/J43 are correct for 1.8V MMC voltage... [6.343875] Attempting to select SDCARD ... Failed [6.403984] Attempting to select eMMC ... Passed [6.674844] Initialized Flash (JEDEC 000000) [6.680382] HSS_QSPIInit() returned 0 Press a key to enter CLI, ESC to skip Timeout in 1 second . [7.691454] CLI boot interrupt timeout [7.696419] Initializing Mi-V IHC [7.700906] Initializing IPI Queues (6056 bytes @ a02fb88)... [7.708068] Initializing PMPs [7.712173] Initializing Boot Image ... [7.717234] Trying to boot via QSPI ... [7.741512] Initialized Flash (JEDEC 000000) [7.747049] Trying to boot via MMC ... [7.752014] Attempting to select SDCARD ... Failed [7.812123] Attempting to select eMMC ... Passed [8.65501] Preparing to copy from MMC to DDR ...
Actually, There is no problem accessing QSPI in kernel after MMC boot. So i kind of doubt HSS doesn't support QSPI function yet.
Please let me know what i miss. Thanks.