pr3y / Bruce

Predatory ESP32 Firmware
https://bruce.computer
GNU Affero General Public License v3.0
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Core, Core2, CoreS3 port follow Up #132

Closed bmorcelli closed 3 months ago

bmorcelli commented 3 months ago

Explanation

Por to these devices had been poorly made, using the same M5Launcher port, but in the case of Bruce theres a necessity to release memory to leave room for other libraries.

Issue

Actually These devices are running without PSRAM support due IRAM limitation, error section .text will not fit in region iram1_0_seg followed by more error messagens, it happens because all functions of M5GFX are being mapped into the lib crowding the Instruction table

It happens when I use these build_flags:

-DBOARD_HAS_PSRAM
-mfix-esp32-psram-cache-issue   
-mfix-esp32-psram-cache-strategy=memw

Solutions 1:

use -DPIO_FRAMEWORK_ARDUINO_MMU_CACHE16_IRAM48 reducing Cache to leave room for more IRAM, but Cache can compromise fw performance

Solution 2:

bmorcelli commented 3 months ago

Better solution is use M5GFX with these devices.. need to redraw the icons for these devices..

bmorcelli commented 3 months ago

Changed M5GFX function calls to match with tft_eSPI and fixed -90° start of fillArc functions.. now drawings are working properly..

PSRAM is still turned off on Core Devices due to IRAM overflow error..

Trial and error:

bmorcelli commented 3 months ago

Switched all Core Devices to M5Unified and M5GFX.

M5GFX: added functions overflowed to match the TFT_eSPI functions and achieve similar results

Next steps: Add parameter on M5.begin(desiredBoars) to build the code with only the desired board functions, to avoid linking innumerous unnecessary functions (such as other Power chip, TFT drivers, touch panels, Speaker drivers and etc...)

bmorcelli commented 3 months ago

Switched Core2 to a modified M5Core2.h lib, to use the TFT_eSPI from Bruce, releasing IRAM and enabling all functions available.

Still needs some polishing