Closed jox1a closed 3 years ago
LCD_RST is Analog#8 i.e. PTC1 (or digital#22) LCD_D0 is Digital#24 i.e. PTA5 LCD_D1 is Digital#25 i.e. PTB19 ...
Everything is possible. But it would be painful. Surely no one would make thirteen deliberate mistakes.
If you had made one or two genuine mistakes, I would write the driver for you. I will let you write your own driver for an exercise.
David.
Hi, again David. Thanks for your answer. (Another Mistake I using Teensy3.2) yeh, that was a BIG MISTAKE. In the first option, this project was with I2C OLED But in my stuff, I found this nice 3" LCD (has never been used before) so I thought why not add an LCD to the project and that's how it happened. just only quick search in google for a libraries
MCUFRIEND_kbv
LCD_ID_readnew.ino
And that was a Fault. I never checked the definition of the new pin allows you to run Display when I correcting the PCB design I used free pins at Teensy (sometimes I do something first and in a few days ... 😮🤔 ..... )
I removed many lines of code from mcufriend_shield.h to check what I need and how this work (a lot of work ahead of me)
I have 2 option
(for now, I choose option 1)
Thanks. D
If you have a valid result from (3) I will write the SPECIAL for you.
I am gobsmacked that anyone can get a pcb made without testing anything first.
David.
readreg.ino
default pins setting
////////////// Read Registers on MCUFRIEND UNO shield controllers either read as single 16-bit e.g. the ID is at readReg(0) or as a sequence of 8-bit values in special locations (first is dummy)
reg(0x0000) B5 09 ID: ILI9320, ILI9325, ILI9335, ... reg(0x0004) 00 00 00 00 Manufacturer ID reg(0x0009) 00 01 00 01 00 Status Register reg(0x000A) 00 00 Get Power Mode reg(0x000C) 00 00 Get Pixel Format reg(0x0061) 00 00 RDID1 HX8347-G reg(0x0062) 00 00 RDID2 HX8347-G reg(0x0063) 00 00 RDID3 HX8347-G reg(0x0064) 00 00 RDID1 HX8347-A reg(0x0065) 00 00 RDID2 HX8347-A reg(0x0066) 00 00 RDID3 HX8347-A reg(0x0067) 00 00 RDID Himax HX8347-A reg(0x0070) 00 00 Panel Himax HX8347-A reg(0x00A1) 00 00 00 00 00 RD_DDB SSD1963 reg(0x00B0) 00 00 RGB Interface Signal Control reg(0x00B4) 00 00 Inversion Control reg(0x00B6) 00 00 00 00 00 Display Control reg(0x00B7) 00 00 Entry Mode Set reg(0x00BF) 00 00 00 00 00 00 ILI9481, HX8357-B reg(0x00C0) 00 00 00 00 00 00 00 00 00 Panel Control reg(0x00C8) 00 00 00 00 00 00 00 00 00 00 00 00 00 GAMMA reg(0x00CC) 00 00 Panel Control reg(0x00D0) 00 00 00 Power Control reg(0x00D2) 00 00 00 00 00 NVM Read reg(0x00D3) 00 00 00 00 ILI9341, ILI9488 reg(0x00D4) 00 00 00 00 Novatek ID reg(0x00DA) 00 00 RDID1 reg(0x00DB) 00 00 RDID2 reg(0x00DC) 00 00 RDID3 reg(0x00E0) 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 GAMMA-P reg(0x00E1) 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 GAMMA-N reg(0x00EF) 00 00 00 00 00 00 ILI9327 reg(0x00F2) 00 00 00 00 00 00 00 00 00 00 00 00 Adjust Control 2 reg(0x00F6) 00 00 00 00 Interface Control
////// reset disconnected for test
Read Registers on MCUFRIEND UNO shield controllers either read as single 16-bit e.g. the ID is at readReg(0) or as a sequence of 8-bit values in special locations (first is dummy)
reg(0x0000) C0 C0 ID: ILI9320, ILI9325, ILI9335, ... reg(0x0004) 00 00 00 00 Manufacturer ID reg(0x0009) C9 C9 C9 C9 C9 Status Register reg(0x000A) CA CA Get Power Mode reg(0x000C) 00 00 Get Pixel Format reg(0x0061) E1 E1 RDID1 HX8347-G reg(0x0062) 00 00 RDID2 HX8347-G reg(0x0063) E3 E3 RDID3 HX8347-G reg(0x0064) E4 E4 RDID1 HX8347-A reg(0x0065) 00 00 RDID2 HX8347-A reg(0x0066) E6 E6 RDID3 HX8347-A reg(0x0067) E7 E7 RDID Himax HX8347-A reg(0x0070) 00 00 Panel Himax HX8347-A reg(0x00A1) E1 E1 E1 E1 E1 RD_DDB SSD1963 reg(0x00B0) 00 00 RGB Interface Signal Control reg(0x00B4) F4 F4 Inversion Control reg(0x00B6) F6 F6 F6 F6 F6 Display Control reg(0x00B7) 00 00 Entry Mode Set reg(0x00BF) FF FF FF FF FF FF ILI9481, HX8357-B reg(0x00C0) 00 00 00 00 00 00 00 00 00 Panel Control reg(0x00C8) C8 C8 C8 C8 C8 C8 C8 C8 C8 C8 C8 C8 C8 GAMMA reg(0x00CC) CC CC Panel Control reg(0x00D0) 00 00 00 Power Control reg(0x00D2) D2 D2 D2 D2 D2 NVM Read reg(0x00D3) D3 D3 D3 D3 ILI9341, ILI9488 reg(0x00D4) D4 D4 D4 00 Novatek ID reg(0x00DA) DA DA RDID1 reg(0x00DB) 00 00 RDID2 reg(0x00DC) DC DC RDID3 reg(0x00E0) E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 GAMMA-P reg(0x00E1) 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 GAMMA-N reg(0x00EF) EF EF EF EF EF EF ILI9327 reg(0x00F2) 00 00 00 00 00 00 00 00 00 00 00 00 Adjust Control 2 reg(0x00F6) F6 F6 F6 F6 Interface Control
///////////////////////////////////////////////////////////////////////////////////////////// readreg.ino
Read Registers on MCUFRIEND UNO shield controllers either read as single 16-bit e.g. the ID is at readReg(0) or as a sequence of 8-bit values in special locations (first is dummy)
reg(0x0000) B5 09 ID: ILI9320, ILI9325, ILI9335, ... reg(0x0004) 00 00 00 00 Manufacturer ID reg(0x0009) 00 01 00 01 00 Status Register reg(0x000A) 00 00 Get Power Mode reg(0x000C) 00 00 Get Pixel Format reg(0x0061) 00 00 RDID1 HX8347-G reg(0x0062) 00 00 RDID2 HX8347-G reg(0x0063) 00 00 RDID3 HX8347-G reg(0x0064) 00 00 RDID1 HX8347-A reg(0x0065) 00 00 RDID2 HX8347-A reg(0x0066) 00 00 RDID3 HX8347-A reg(0x0067) 00 00 RDID Himax HX8347-A reg(0x0070) 00 00 Panel Himax HX8347-A reg(0x00A1) 00 00 00 00 00 RD_DDB SSD1963 reg(0x00B0) 00 00 RGB Interface Signal Control reg(0x00B4) 00 00 Inversion Control reg(0x00B6) 00 00 00 00 00 Display Control reg(0x00B7) 00 00 Entry Mode Set reg(0x00BF) 00 00 00 00 00 00 ILI9481, HX8357-B reg(0x00C0) 00 00 00 00 00 00 00 00 00 Panel Control reg(0x00C8) 00 00 00 00 00 00 00 00 00 00 00 00 00 GAMMA reg(0x00CC) 00 00 Panel Control reg(0x00D0) 00 00 00 Power Control reg(0x00D2) 00 00 00 00 00 NVM Read reg(0x00D3) 00 00 00 00 ILI9341, ILI9488 reg(0x00D4) 00 00 00 00 Novatek ID reg(0x00DA) 00 00 RDID1 reg(0x00DB) 00 00 RDID2 reg(0x00DC) 00 00 RDID3 reg(0x00E0) 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 GAMMA-P reg(0x00E1) 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 GAMMA-N reg(0x00EF) 00 00 00 00 00 00 ILI9327 reg(0x00F2) 00 00 00 00 00 00 00 00 00 00 00 00 Adjust Control 2 reg(0x00F6) 00 00 00 00 Interface Control
////// reset disconnected for test
Read Registers on MCUFRIEND UNO shield controllers either read as single 16-bit e.g. the ID is at readReg(0) or as a sequence of 8-bit values in special locations (first is dummy)
reg(0x0000) C0 C0 ID: ILI9320, ILI9325, ILI9335, ... reg(0x0004) C4 C4 C4 C4 Manufacturer ID reg(0x0009) C9 C9 C9 C9 C9 Status Register reg(0x000A) CA CA Get Power Mode reg(0x000C) CC CC Get Pixel Format reg(0x0061) E1 E1 RDID1 HX8347-G reg(0x0062) E2 E2 RDID2 HX8347-G reg(0x0063) E3 E3 RDID3 HX8347-G reg(0x0064) E4 E4 RDID1 HX8347-A reg(0x0065) E5 E5 RDID2 HX8347-A reg(0x0066) E6 E6 RDID3 HX8347-A reg(0x0067) E7 E7 RDID Himax HX8347-A reg(0x0070) F0 F0 Panel Himax HX8347-A reg(0x00A1) E1 E1 E1 E1 E1 RD_DDB SSD1963 reg(0x00B0) F0 F0 RGB Interface Signal Control reg(0x00B4) F4 F4 Inversion Control reg(0x00B6) F6 F6 F6 F6 F6 Display Control reg(0x00B7) F7 F7 Entry Mode Set reg(0x00BF) FF FF FF FF FF FF ILI9481, HX8357-B reg(0x00C0) C0 C0 C0 C0 C0 C0 C0 C0 C0 Panel Control reg(0x00C8) C8 C8 C8 C8 C8 C8 C8 C8 C8 C8 C8 C8 C8 GAMMA reg(0x00CC) CC CC Panel Control reg(0x00D0) D0 D0 D0 Power Control reg(0x00D2) D2 D2 D2 D2 D2 NVM Read reg(0x00D3) D3 D3 D3 D3 ILI9341, ILI9488 reg(0x00D4) D4 D4 D4 D4 Novatek ID reg(0x00DA) DA DA RDID1 reg(0x00DB) DB DB RDID2 reg(0x00DC) DC DC RDID3 reg(0x00E0) E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 E0 GAMMA-P reg(0x00E1) E1 E1 E1 E1 E1 E1 E1 E1 E1 E1 E1 E1 E1 E1 E1 E1 GAMMA-N reg(0x00EF) EF EF EF EF EF EF ILI9327 reg(0x00F2) F2 F2 F2 F2 F2 F2 F2 F2 F2 F2 F2 F2 Adjust Control 2 reg(0x00F6) F6 F6 F6 F6 Interface Control
David, I think is something wrong with this LCD or maybe I don't understand what is what.
first time when I download your library (3-4 month ago) LCD was identified as B5B5
Are you taking the p*ss ?
report #1 looks fine (for a Uno) report #2 is bollocks report #3 looks fine for your USE_JOX1A wiring report #4 is bollocks
The LCD_RST pin is connected for a good reason. Here is a SPECIAL that matches your defines. Untested.
//####################################### USE_JOX1A && TEENSY 3.2 ############################
#elif defined(USE_JOX1A) && defined(__MK20DX256__) //
#warning USE_JOX1A
//LCD pins |D7 |D6 |D5 |D4 |D3 |D2 |D1 |D0 | |RD |WR |RS |CS |RST|
//MK20 pin |PE0|PC11|PC10|PC8|PC9|PE1|PB19|PA5| |PD6|PD5|PB1|PB0|PC1|
#define WRITE_DELAY { WR_ACTIVE2; }
#define IDLE_DELAY { }
#define READ_DELAY { RD_ACTIVE8; RD_ACTIVE; }
#define RD_PORT GPIOD //A7 PTD6
#define RD_PIN 6
#define WR_PORT GPIOD //A6 PTD5
#define WR_PIN 5
#define CD_PORT GPIOB //A3 PTB1
#define CD_PIN 1
#define CS_PORT GPIOB //A2 PTB0
#define CS_PIN 0
#define RESET_PORT GPIOC //A8 PTC1
#define RESET_PIN 1
// configure macros for the data pins
#define AMASK (1<<5)
#define BMASK (1<<19)
#define CMASK ((1<<9)|(1<<8)|(1<<10)|(1<<11))
#define EMASK ((1<<1)|(1<<0))
#define write_8(d) { \
GPIOA_PCOR = AMASK; GPIOB_PCOR = BMASK; GPIOC_PCOR = CMASK; GPIOE_PCOR = EMASK; \
GPIOA_PSOR = (((d) & (1 << 0)) << 5); \
GPIOB_PSOR = (((d) & (1 << 1)) << 18); \
GPIOC_PSOR = (((d) & (1 << 3)) << 6) \
| (((d) & (1 << 4)) << 4) \
| (((d) & (1 << 5)) << 5) \
| (((d) & (1 << 6)) << 5); \
GPIOE_PSOR = (((d) & (1 << 2)) >> 1) \
| (((d) & (1 << 7)) >> 7); \
}
#define read_8() ((((GPIOA_PDIR & (1<<5)) >> 5) \
| ((GPIOB_PDIR & (1 << 19)) >> 18) \
| ((GPIOE_PDIR & (1 << 1)) << 1) \
| ((GPIOC_PDIR & (1 << 9)) >> 6) \
| ((GPIOC_PDIR & (1 << 8)) >> 4) \
| ((GPIOC_PDIR & (1 << 10)) >> 5) \
| ((GPIOC_PDIR & (1 << 11)) >> 5) \
| ((GPIOE_PDIR & (1 << 0)) << 7)))
#define setWriteDir() {GPIOA_PDDR |= AMASK;GPIOB_PDDR |= BMASK;GPIOC_PDDR |= CMASK;GPIOE_PDDR |= EMASK; }
#define setReadDir() {GPIOA_PDDR &= ~AMASK;GPIOB_PDDR &= ~BMASK;GPIOC_PDDR &= ~CMASK;GPIOE_PDDR &= ~EMASK; }
#define write8(x) { write_8(x); WRITE_DELAY; WR_STROBE; IDLE_DELAY; }
#define write16(x) { uint8_t h = (x)>>8, l = x; write8(h); write8(l); }
#define READ_8(dst) { RD_STROBE; READ_DELAY; dst = read_8(); RD_IDLE; } //PJ adjusted
#define READ_16(dst) { uint8_t hi; READ_8(hi); READ_8(dst); dst |= (hi << 8); }
//#define GPIO_INIT() {SIM_SCGC5 |= 0x3E00;} //PORTA-PORTE
#define GPIO_INIT() {for (int i = 24; i <= 31; i++) pinMode(i, OUTPUT); \
pinMode(A2, OUTPUT); pinMode(A3, OUTPUT); \
for (int i = A6; i <= A8; i++) pinMode(i, OUTPUT);}
#define PASTE(x, y) x ## y
#define PIN_LOW(port, pin) PASTE(port, _PCOR) = (1<<(pin))
#define PIN_HIGH(port, pin) PASTE(port, _PSOR) = (1<<(pin))
#define PIN_OUTPUT(port, pin) PASTE(port, _PDDR) |= (1<<(pin))
Thanks a lot, David. I will test ASAP and I give you info on how it works. Really many thanks for your HELP.
It works perfectly.
Again many thanks
You saved me a lot of time.
You are the right person in the right place.
Don't get me wrong, you created this library, you know the best what is what.
Thanks for your time.
You know the world is small maybe I will meet you someday.
You have a big beer from me.
![Uploading P_20200610_230231.jpg…]()
@jox1a,
A fellow reader has the same Open-Smart 3.3V board.
Since you have a Teensy3.2 which is much faster than a Due, please can you verify that the R61509V can run reliably at high speed.
e.g. overclock the Teensy from the Arduino IDE. Do you get glitches in graphictest_kbv.ino ? Please report.
David.
Hi. David I use your library in standard configuration with Teensy3.1 and R61059 it works well. LCD 3inch 240x400 R61059V ----- Teensy RST-A4 CS --A3 RS --A2 WR--A1 RD--A0 DO--8 D1--9 D2--2 D3--3 D4--4 D5--5 D6--6 D7--7 I don't use any kind of shield I working on a power supply project I have my custom PCB but I made a mistake before and I didn't check a pinout in your library. so now I have PCB But I don't know exactly how to change pins set for
RST-A8 CS --A2 RS --A3 WR--A6 RD--A7 DO--24 D1--25 D2--26 D3--27 D4--28 D5--29 D6--30 D7--31 is it even possible?