discussion: a consistent way to pad circuit rows

[lispc]

Currently state circuit prepads some "Start" rows before "real rows", while evm circuit pads "EndBlock" after "real rows".

We did some benchmarks on witness assignment recently, and finds evm circuit witness assignment a bit expensive( when k = 20, it takes ~100s). So we are considering following state circuit design, we also use "prepad Start rows" method to deal with evm circuit, we guess with carefully designed gates, it may be possible to make most (even all) columns in "start rows" region 0, and greatly improve assignment speed. (EndBlock checks a lot of constraints, it is more difficult to find a "quick path" to assign EndBlock than assign "Start")

Is this general idea sounds acceptable? If ok, we will do more experiments on this idea.

[ed255]

This idea sounds really good to me! In general, I think trying to apply the same patterns consistently in all circuits is a very good idea to reduce complexity and cognition overhead to understand the circuits.

Are you thinking about adding a new ExecutionState to the EVM called Start? Currently the EVM Circuit constraints the first state to be BeginTx/EndBlock and the last state to be EndBlock, so I think front padding would require a new ExecutionState::Start

Something to bear in mind: since the steps in the EVM Circuit have dynamic size, you'll need to go through all the non-Start steps that you plan to assign to figure out the total required height in order to know how many front-padding rows are required. I don't think this will be a problem because once the circuit has been configured, the height of an ExecutionState is easily known.

I also think having a front-padding Start state that doesn't do anything (or does a very minimum amount of checks) may be cleaner than having a padding EndBlock (where we reuse a step that does checks to also do padding).