pro711 / sublime-verilog

Verilog Package for Sublime Text 2/3
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Signed Base Values not Properly Detected #1

Closed adkich closed 11 years ago

adkich commented 11 years ago

I propose the start of the number regex match be changed from:

(\b\d+)?'...

to

(\b\d+)?'s?...

This would allow proper matching of Verilog 2001 signed numbers. From Signed Arithmetic in Verilog 2001 – Opportunities and Hazards, by Dr. Greg Tumbush of Starkey Labs;

"The only way to declare a signed value in Verilog 1995 was to declare it as an integer which limited the size of the value to 32-bits only[1]. Verilog 2001 provides the ‘s construct for declaring and specifying a sized value assigned. For example, 2 represented as a 3-bit signed hex value would be specified as 3’sh2. Somewhat confusing is specifying negative signed values. The value -4 represented as a 3-bit signed hex value would be specified as -3’sh4. A decimal number is always signed."

pro711 commented 11 years ago

Fixed. Thanks!