probe-rs / embedded-test

A test harness and runner for embedded devices
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Fix logging via target-rtt #23

Closed linasdev closed 7 months ago

linasdev commented 7 months ago

If target-rtt is used instead of defmt and rtt_target::rtt_init_print!() is called at the beggining of the #[init] function, it still does not print anything and fails to attach to RTT, at least on Cortex-M3 (STM32F103RE to be exact). Enabling the rtt feature (this PR) and removing rtt_target::rtt_init_print!() from #[init] seems to fix it.

t-moe commented 7 months ago

Thank you @linasdev. This is integrated in the new version 0.3.0.

t-moe commented 7 months ago

I've an unrelated question @linasdev Have you observed whether hard faults are considered as test failure or does the test just hang in that case?

(I dont have a ARM controller lying around, and on riscv we dont have hardfaults..)

Thank you

linasdev commented 7 months ago

I've an unrelated question @linasdev Have you observed whether hard faults are considered as test failure or does the test just hang in that case?

(I dont have a ARM controller lying around, and on riscv we dont have hardfaults..)

Thank you

I will test this today.

linasdev commented 7 months ago

I've an unrelated question @linasdev Have you observed whether hard faults are considered as test failure or does the test just hang in that case?

(I dont have a ARM controller lying around, and on riscv we dont have hardfaults..)

Thank you

With the following test case:

#![no_std]
#![no_main]

#[cfg(test)]
#[embedded_test::tests]
mod tests {
    use fugit::HertzU32;
    use stm32f1xx_hal::prelude::*;
    use stm32f1xx_hal::{device::Peripherals, prelude::_stm32_hal_flash_FlashExt, rcc::RccExt};

    struct State {
    }

    #[init]
    fn init() -> State {
        let dp = Peripherals::take().unwrap();

        let mut flash = dp.FLASH.constrain();
        let rcc = dp.RCC.constrain();
        rcc.cfgr.use_hse(HertzU32::MHz(8))
            .sysclk(HertzU32::MHz(72))
            .hclk(HertzU32::MHz(72))
            .pclk1(HertzU32::MHz(36))
            .pclk2(HertzU32::MHz(72))
            .freeze(&mut flash.acr);

        State { }
    }

    #[test]
    fn udf_test() {
        cortex_m::asm::udf();
    }
}

It seems to work (causes test failure):

running 1 test
test tests::udf_test ... FAILED

failures:

---- tests::udf_test ----
CPU halted unexpectedly.

failures:
    tests::udf_test

test result: FAILED. 0 passed; 1 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.35s

error: test failed, to rerun pass `--test udf_test`
t-moe commented 7 months ago

Thanks a lot for testing this!