Open andreasWallnerIFX opened 5 months ago
probe-rs info
is a bit of a special case, because it tries to autodetect the connected chip. I'm not sure if it even considers the chip
argument.
What happens if you try something like probe-rs debug --chip riscv
?
I'm inclined to remove or rename probe-rs info
. It's just not useful for anything non-ARM currently (even if some other chips may have coresight compatible components). info
is very brute-force, and there's a very good chance it does something evil to the connected device, because it's essentially sending random bits to something unknown and hoping it'll understand.
the ID is read correctly the TAP is detected correctly (IR length 8, 1 tap)
💓
which seems to want to do a SWD reset.
Ugh... Anything related to protocols is a mess currently 😭
The core itself implements the RISC-V debug spec v0.13.2 - but I guess this should make a difference since probe-rs never reads the version?
It should, if it gets to that point: https://github.com/probe-rs/probe-rs/blob/88d09eb2045f2b2d89feefc9c31cbd4896397efc/probe-rs/src/architecture/riscv/communication_interface.rs#L451-L457
I'm inclined to remove or rename
probe-rs info
. It's just not useful for anything non-ARM currently (even if some other chips may have coresight compatible components).info
is very brute-force, and there's a very good chance it does something evil to the connected device, because it's essentially sending random bits to something unknown and hoping it'll understand.
The whole reason info
exists is to help with developing probe-rs, it was never intended to be a public tool. But people liked the CLI examples in probe-rs so much that they became an actual tool... 😄
Maybe we should move it back to an example, but I would very much like to keep it, it is very useful when looking at ARM chips.
probe-rs info
is a bit of a special case, because it tries to autodetect the connected chip. I'm not sure if it even considers thechip
argument.
That explains my initial issue - I thought I'd start out with a simple command 😢
The core itself implements the RISC-V debug spec v0.13.2 - but I guess this should make a difference since probe-rs never reads the version?
It should, if it gets to that point:
Above I meant that it shouldn't make a difference since probe-rs
never got that far, that's all good now
What happens if you try something like probe-rs debug --chip riscv?
That looks much better, but still does not work - I'll have to go through the log to see what's happening and why it's failing, but will do that tomorrow. Been a long day already...
Ok - the remaining issue that I have seems to be in our silicon - not probe-rs 💯
OpenOCD is happy to continue, increase the idle cycles to a number where our silicon starts to work - which hid the issue so far.
What would you think of a setting to overwrite the number of idle cycles that are read from the card? (Not a real fan of the auto-increment in OOCD). I'd be happy to make a PR - but only if you would be fine with such a thing... (also totally fine if you don't think it fits - it's certainly a niche use-case to have to overwrite info that the chip provides)
Maybe to expand a bit on the issue here since I'm not 100% sure on how to read the debug spec. What happens is:
dmcontrol
is written to 0x0001dmstatus
is read - this read returns a "BUSY" sticky response (this read writes 0x44000000001 to the DR
)dmstatus
is immediately read again - it now successfully reads 0x00000001The value read from dmstatus
is inconsistent (incorrect version, also some other bits are incorrect)
OpenOCD will in this case add additional IDLE cycles until there is no busy response anymore.
I guess they read the RISC-V debug spec v1.0, 6.1.5 - where the op
description in the table says about the busy state: "If a debugger sees this status, it needs to give the target more TCK edges between Update-DR and Capture-DR" and decided to in these cases ignore the reponse from the DUT.
What I'm not sure about: On the other hand there is the note in 6.1.5 stating that "In Update-DR, the DTM start the operation specified in op unless the current status reported in op is sticky - which to me does not explicitly invalidate the command sent before (and I couldn't find an indication for that anywhere else in the spec...
But also the text for "In Capture-DR, the DTM updates data with the result from that operation, ..."
If the operation did not happen (because the status is busy) then the question is what that operation refers to - the one that was ignored, or the previous one.
EDIT: the more often I read that part of the spec, the more I think that OpenOCD is doing the right thing here (we should have put the correct number of needed idle cycles into the dtmcs
register, but the spec does have the mandate to increase the number in case of busy responses...
Here also two picture from the logic analyzer to help the description (just snipping out a bunch of idle time):
Describe the bug I'm trying to debug an in-house RISC-V core via JTAG, using the generic "riscv" chip setting.
probe-rs info...
does not work for me, looking at the logs it seems it's using the ARM driver. (also looking at the logic analyzer trace the commands written to IR)To Reproduce
I'm using an FT4232 as my JTAG adapter. The chip in question does not have a TRST. Running
RUST_LOG=debug probe-rs info --chip riscv --protocol jtag
(specifiying the protocol because of #522) I get:Log output
``` ... some probing DEBUG probe_rs::probe::ftdi::ftdaye: scanning 4 interfaces DEBUG probe_rs::probe::ftdi::ftdaye: Interface is #0 DEBUG probe_rs::probe::ftdi::ftdaye: interface 1 does not match requested interface A DEBUG probe_rs::probe::ftdi::ftdaye: interface 2 does not match requested interface A DEBUG probe_rs::probe::ftdi::ftdaye: interface 3 does not match requested interface A DEBUG nusb::platform::windows_winusb::device: Claiming device DevInst(1) interface 0 with interface path `\\?\USB#VID_0403&PID_6011#9&133b0cf5&0&3#{a5dcbf10-6530-11d2-901f-00c04fb951ed}` DEBUG probe_rs::probe::ftdi::ftdaye: Opened FTDI device: Some(FT4232H) DEBUG probe_rs::probe::ftdi: opened probe: FtdiProbe { adapter: JtagAdapter { device: Device { chip_type: Some(FT4232H) }, speed_khz: 1000, command: None { tms: false }, commands: [], in_bit_counts: [], in_bits: BitVecOf note for me are:
probe_rs::architecture::arm::sequences
which seems to want to do a SWD reset.Expected behavior
probe-rs
should send RISC-V debug instructions, not ARM ones.Desktop (please complete the following information):
Additional context The core itself implements the RISC-V debug spec v0.13.2 - but I guess this should make a difference since
probe-rs
never reads the version?In case it is of any help, our openocd config that works:
FT4232H.cfg
``` adapter driver ftdi ftdi_vid_pid 0x0403 0x6011 ftdi_layout_init 0x0008 0x000b ftdi_layout_signal nTRST -data 0x0010 -oe 0x0010 ftdi_layout_signal nSRST -data 0x0020 -oe 0x0020 reset_config srst_only srst_pulls_trst adapter speed 1000 transport select jtag set _CHIPNAME riscv jtag newtap $_CHIPNAME cpu -irlen 8 set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME riscv -chain-position $_TARGETNAME gdb_report_data_abort enable gdb_breakpoint_override hard init ```