Missing verilog files - Githubissues

progranism / Open-Source-FPGA-Bitcoin-Miner

A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.

GNU General Public License v3.0

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Missing verilog files #14

Closed vikasg29 closed 10 years ago

vikasg29 commented 11 years ago

I am not able to find module defination for following instances

altshift_taps # (.number_of_taps(1), .tap_distance(LENGTH), .width(32)) shifttaps

progranism commented 11 years ago

altshift_taps is provided by Altera's synthesis software, Quartus II.