progranism / Open-Source-FPGA-Bitcoin-Miner

A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.
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Xilinx VHDL synthesizing forever #5

Closed masta79 closed 13 years ago

masta79 commented 13 years ago

I've tried to synthesize the VHDL-Core for a Xilinx XC3S700A , but ISE hangs now for over 45 minutes now in "Advanced HDL Synthesis". Is this supposed to be normal?

progranism commented 13 years ago

Is that with the default DEPTH setting of 6? 45 minutes seems a bit long for the Synthesis stage, unless your machine is particularly slow, but you could let it keep running and see if it finishes within an hour or two. Or turn down the effort level.

I did not personally get the chance to test that code on my own board. It was written by TheSeven ( http://forum.bitcoin.org/index.php?action=profile;u=15929). You may try messaging him directly if Synthesis doesn't complete.

~fpgaminer

On Mon, Jun 13, 2011 at 2:27 PM, masta79 < reply@reply.github.com>wrote:

I've tried to synthesize the VHDL-Core for a Xilinx XC3S700A , but ISE hangs now for over 45 minutes now in "Advanced HDL Synthesis". Is this supposed to be normal?

Reply to this email directly or view it on GitHub: https://github.com/progranism/Open-Source-FPGA-Bitcoin-Miner/issues/5

masta79 commented 13 years ago

Ok, reducing DEPTH to 2 finished the synthesizer in under 2 minutes. I was a bit shocked when I realized that this won't fit a Spartan-3 XC3S700A. At least with Depth=1 it fits.

progranism commented 13 years ago

Yeah the XC3S700A only has ~13K LCs. A fully unrolled design will use upwards of 80K or 90L LCs (DEPTH=6). Each decrement of DEPTH reduces the size by a factor of 2, roughly.

~fpgaminer

On Mon, Jun 13, 2011 at 3:11 PM, masta79 < reply@reply.github.com>wrote:

Ok, reducing DEPTH to 2 finished the synthesizer in under 2 minutes. I was a bit shocked when I realized that this won't fit a Spartan-3 XC3S700A. At least with Depth=1 it fits.

Reply to this email directly or view it on GitHub:

https://github.com/progranism/Open-Source-FPGA-Bitcoin-Miner/issues/5#issuecomment-1362294