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project-oak
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silveroak
Formal specification and verification of hardware, especially for security and privacy.
Apache License 2.0
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Example SystemVerilog output from SilverOak stage 1
#951
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blaxill
opened
2 years ago
blaxill
commented
2 years ago
Not intended to be merged, just to show generated SystemVerilog
Not intended to be merged, just to show generated SystemVerilog