There is a contradiction between 'lane sequencer to functional units' and 'lane sequencer to operand requester'.

[TimLee-123]

Issue

We identified a contradiction during verification when the lane sequencer communicates with both the functional unit and the operand requester.

The main reason for this is that when an instruction is sent to the lane sequencer and vl is 0, it does not proceed to the subsequent functional unit. However, at the same time, the lane sequencer instructs the operand requester to fetch operands for an instruction that is no longer needed for computation.

For example, there are two instructions. The first one is a 'vmv' instruction, and its vl parameter is set to 0. The second instruction is a 'vadd' instruction. From the waveform below, It can be observed that the 'vmv' instruction is notably absent within the instructions transmitted from the lane sequencer to the VALU. However, the lane sequencer still instructs the operand requester to initiate a request for this instruction. This ultimately results in the vs1 of the 'vmv' instruction being treated as the vs1 of the 'vadd' instruction, leading to an error.

From the waveform, it can be seen that both v8 and v24 have values of 0. However, due to the aforementioned reasons, the vs1 of vadd is changed to come from v0, ultimately resulting in a non-zero value being written back to v4.

By suggestion, when the valid signal from the lane sequencer to functional units is 0, the valid signal from the lane sequencer to the operand requester should also be set to 0.

Supplementary Pictures

[mp-17]

Hello @TimLee-123 ,

Thank you very much for all your contributions. We are planning to solve all the issues in bundle with a targeted verification effort.