pulp-platform / ara

The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core
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[HW] Add hierarchical Verilation #349

Closed mp-17 closed 3 months ago

mp-17 commented 3 months ago

Temporary fix for 16-lane verilation

Finally, Verilator will support custom parameters through hierarchical blocks. Waiting for the next stable release, this is a temporary fix not to crash the 16-lane verilation on GitHub CI servers.

The hierarchical compilation feature was once removed because of a custom parameter type being passed by Ara to the Lane modules. Verilator did not like this, so we removed hierarchical verilation. However, the github CI cannot compile the 16-lane design anymore without running out of memory.

Description of PR that completes issue here...

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