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pulp-platform
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axi-io-pmp
Input / Output Physical Memory Protection Unit for RISC-V
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Add pmp
#1
Closed
andreaskuster
closed
2 years ago
andreaskuster
commented
2 years ago
This PR adds the following features:
replace
LibreCores AXI
modules with
pulp-platform/axi
modules
disable CI pipeline until
the verilator getting stuck issue
has been resolved
add documentation
remove myhdl wrapper (we use cocotb, cocotbext-axi & pytest)
add PMP (hw & sw) to implement first basic IO-PMP functionality
replace verilog with systemverilog code
add dut wrapper to de-couple cocotbext-axi with pulp-platform req_t/resp_t axi interfacing
This PR adds the following features: