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cheshire
A minimal Linux-capable 64-bit RISC-V SoC built around CVA6
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hw: Add SMP support to boot ROM
#58
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niwis
closed
1 year ago
niwis
commented
1 year ago
Add SMP support in the bootrom. In particular,
pause all harts except
0
at the beginning of the bootrom,
let all harts jump to next boot stage after hart
0
finished bootrom,
park all harts except
0
at the beginning of crt0 for now (to be extended).
To facilitate this,
increase the number of scratch registers from 4 to 16 (e.g. for boot address synchronisation),
add a register containing the number of harts.
Add SMP support in the bootrom. In particular,
0
at the beginning of the bootrom,0
finished bootrom,0
at the beginning of crt0 for now (to be extended).To facilitate this,