This PR aims to replace the multiple APB ports currently used for configuring the external PADs and FLLs configuration registers with a single shared port. This change eliminates the need to introduce additional ports for future physically aware extensions, such as adding more FLLs, PADs, or PMU controller registers.
ADDED - HW
All _regbus requests directed outside the Chimera_SoC are now included in the same address map rule. These requests are converted into the AMBA APB protocol and routed through a single APB interface.
APB Interface
This PR aims to replace the multiple APB ports currently used for configuring the external PADs and FLLs configuration registers with a single shared port. This change eliminates the need to introduce additional ports for future physically aware extensions, such as adding more FLLs, PADs, or PMU controller registers.
ADDED - HW
All _regbus requests directed outside the Chimera_SoC are now included in the same address map rule. These requests are converted into the AMBA APB protocol and routed through a single APB interface.