According to the IEEE 1364.1-2005 spec 6.3.2, the use of translate_off/translate_on is discouraged as opposed to `ifndef SYNTHESIS. Plus, some newer SystemVerilog frontends such as sv2v, Verible, and PySlint do not have any extra AST support for translate_off, so they may get confused by unsupported unsynthesizable constructs.
Therefore, I changed 38 occurrences of translate_off to `ifndef SYNTHESIS. However, I kept 4 deprecated modules with translate_off because I wasn't sure whether they should match the non-deprecated modules' style:
Hello!
According to the IEEE 1364.1-2005 spec 6.3.2, the use of
translate_off
/translate_on
is discouraged as opposed to`ifndef SYNTHESIS
. Plus, some newer SystemVerilog frontends such as sv2v, Verible, and PySlint do not have any extra AST support fortranslate_off
, so they may get confused by unsupported unsynthesizable constructs.Therefore, I changed 38 occurrences of
translate_off
to`ifndef SYNTHESIS
. However, I kept 4 deprecated modules withtranslate_off
because I wasn't sure whether they should match the non-deprecated modules' style:"src/deprecated/generic_fifo.sv"
"src/deprecated/generic_fifo_adv.sv"
"src/deprecated/find_first_one.sv"
"src/deprecated/fifo_v2.sv"
Also, I would be happy to hear another perspective if you feel that
translate_off
is in fact the better option.Thanks!