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pulp-platform / pulp_soc

pulp_soc is the core building component of PULP based SoCs
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FPGA Genesys2 port #6

Closed meggiman closed 5 years ago

meggiman commented 5 years ago

Add support for the genesys2 FPGA board to pulpissimo. At the moment, only the riscv-debug unit with a Ri5CY core is tested. Regarding peripherals: UART and GPIO is verified to work. Other peripherals have reasonable mappings to board components but were not tested so far.