Firstly, We have a security module called AEGIS (encryption, decryption and authentication security protocol). And it has the following signals:
input signals:
256-bit key,
256-bit initialization vector,
64-bit associated data length,
64-bit message length,
128-bit associated data,
128-bit Tag Input,
128-bits plain text input (data to be encrypted),
128-bit Cipher Input (ciphered data to be decrypted),
input signal clock,
input signal reset,
input signal aegis Start,
input signal E_or_D (encryption or decryption),
output signals:
128-bit plain text output (decrypted data),
128-bit Cipher output (encrypted data),
128-bit Encryption Tag output,
output signal Encryption Block Done,
output signal Decryption Block Done,
output signal aegis Done
,So we want to connect it to the APB bus (peripheral bus). We wonder what the best way to do it without changing a lot of RTL.
Secondly, does the APB bus runs on the same clock as the AXI bus (core clock) or it runs on a slower clock and if it's true how does the APB get its slower clock?
We have two inquiries.
Firstly, We have a security module called AEGIS (encryption, decryption and authentication security protocol). And it has the following signals:
input signals:
256-bit key, 256-bit initialization vector, 64-bit associated data length, 64-bit message length, 128-bit associated data, 128-bit Tag Input, 128-bits plain text input (data to be encrypted), 128-bit Cipher Input (ciphered data to be decrypted), input signal clock, input signal reset, input signal aegis Start, input signal E_or_D (encryption or decryption),
output signals:
128-bit plain text output (decrypted data), 128-bit Cipher output (encrypted data), 128-bit Encryption Tag output, output signal Encryption Block Done, output signal Decryption Block Done, output signal aegis Done
,So we want to connect it to the APB bus (peripheral bus). We wonder what the best way to do it without changing a lot of RTL.
Secondly, does the APB bus runs on the same clock as the AXI bus (core clock) or it runs on a slower clock and if it's true how does the APB get its slower clock?