Open zhayongquan opened 1 year ago
Please use https://github.com/pulp-platform/riscv-gnu-toolchain and report back.
The error you are indicating is something related to frep instructions. These are not available on PULPissimo but comes from our snitch based projects.
When I used https://github.com/pulp-platform/riscv-gnu-toolchain to build the toolchain, the error still appears: fatal error: error in backend: Cannot select: intrinsic %llvm.riscv.frep.infer I wrote a simple loop test file test.c and added #pragma frep infer outside the loop. I wanted to see how the hardware loops behaves in the .s file. Or is there any other way to view the representation of hardware loop instructions down to assembly? Thank you so much.
riscv-gnu-toolchain does not have frep
it is anyway not supported on CV32 cores used in PULPissimo. You are not using riscv-gnu-toolchain its plainly obvious from the error message. LLVM is another compiler toolchain.
If I use the LLVM compiler toolchain and want to see .c files containing loops lowering to assembly files like: lp.starti,lp.endi, lp.counti. I used https://github.com/pulp-platform/llvm-project, and https://github.com/pulp-platform/riscv-gnu-toolchain. The compilation .s command is: clang ./test.c --gcc-toolchain=/install-pulp-path --target=riscv32 -O2 -S -o test.s I would like to ask whether my method is wrong, or if some parameters are ignored by me, or The extended part of the hardware loop instruction is not used correctly? Thank you very much.
When I compiled pulp-platform/llvm-project and pulp-platform/pulp-riscv-gnu-toolchain. I want to compile the .s file to view the assembly representation of the hardware cycle. The error message shows: fatal error: error in backend: Cannot select: intrinsic %llvm.riscv.frep.infer